Abstract: An insulating gate type semiconductor device being capable of easily depleting an outer periphery region is provided. The insulating gate type semiconductor device includes: first to fourth outer periphery trenches formed in a front surface of a semiconductor substrate; insulating layers located in the outer periphery trenches; fifth semiconductor regions being of a second conductive type and formed in ranges exposed to bottom surfaces of the outer periphery trenches; and a connection region connecting the fifth semiconductor region exposed to the bottom surface of the second outer periphery trench to the fifth semiconductor region exposed to the bottom surface of the third outer periphery trench. A clearance between the second and third outer periphery trenches is wider than each of a clearance between the first and second outer periphery trenches and a clearance between the third and fourth outer periphery trenches.

Abstract: A semiconductor device is provided with a semiconductor substrate and a trench gate. The semiconductor substrate is provided with a drift region of a first conductive type, wherein the drift region is in contact with the trench gate; a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the trench gate; a source region of the first conductive type, wherein the source region is disposed above the body region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate; and a front surface region of the second conductive type, wherein the front surface region is disposed above the source region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate.

Abstract: A diode is provided with a semiconductor substrate; an anode electrode located on a front surface of the semiconductor substrate; and a cathode electrode located on a rear surface of the semiconductor substrate. Each of the p-type contact regions includes: a first region being in contact with the anode electrode; a second region located on the rear surface side of the first region, having a p-type impurity density lower than a p-type impurity density in the first region; and a third region located on the rear surface side of the second region and having a p-type impurity density lower than the p-type impurity density in the second region. A thickness of the second region is thicker than a thickness of the first region.

Abstract: A manufacturing method of a semiconductor device is provided by forming a trench in a surface of a SiC substrate, positioning a protective substrate to cover the trench, and annealing the SiC substrate and the protective substrate.

Abstract: A silicon carbide semiconductor device includes: a substrate; a drift layer; a current dispersion layer; a base region; a source region; trenches; a gate insulation film; a gate electrode; a source electrode; a drain electrode; and a bottom layer. The current dispersion layer is arranged on the drift layer, and has a first conductive type with an impurity concentration higher than the drift layer. The bottom layer has a second conductive type, is arranged under the base region, covers a bottom of each trench including a corner portion of the bottom of the trench, and has a depth equal to or deeper than the current dispersion layer.

Abstract: A semiconductor device includes a semiconductor substrate, a trench extending from a front surface toward a rear surface side of the semiconductor substrate, and an insulator filled in the trench. The semiconductor substrate is provided with in this order from the rear surface side toward the front surface, an n-type drift region, a p-type base region provided on a front surface side of the drift region, a p-type diffusion region provided on a front surface side of the base region and having a higher impurity concentration than that of the base region. The trench pierces the diffusion region and the base region, and reaches the drift region. A void is provided in a portion of the insulator that is filled between portions of the p-type diffusion region that are exposed on both side surfaces of the trench when seen along a vertical cross section of the semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor substrate. The element region of the semiconductor substrate includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and a plurality of first floating regions, each the first floating regions having the first conductivity type. The termination region includes a second drift region having the second conductivity type, and a plurality of second floating regions, each of the second floating regions having the first conductivity type. The each of the second floating regions is surrounded by the second drift region. When a depth of a center of the first drift region is taken as a reference depth, at least one of the second floating regions is placed closer to the reference depth than each of the first floating regions.

Abstract: A FET incorporating a Schottky diode has a structure allowing the ratio of an area in which the Schottky diode is formed and an area in which the FET is formed to be freely adjusted. A trench extending for a long distance is utilized. Schottky electrodes are interposed at positions appearing intermittently in the longitudinal direction of the trench. By taking advantage of the growth rate of a thermal oxide film formed on SiC being slower, and the growth rate of a thermal oxide film formed on polysilicon being faster, a structure can be obtained in which insulating film is formed between gate electrodes and Schottky electrodes, between the gate electrodes and a source region, between the gate electrodes and a body region, and between the gate electrodes and a drain region, and in which insulating film is not formed between the Schottky electrodes and the drain region.

Abstract: A semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate is disclosed. The IGBT region includes: a body layer of a first conductivity type that is formed on a front surface of the semiconductor substrate; a body contact layer of the first conductivity type that is partially formed on a front surface of the body layer and has a higher impurity concentration of the first conductivity type than the body layer; an emitter layer of a second conductivity type that is partially formed on the front surface of the body layer; a drift layer; a collector layer; and a gate electrode. In the semiconductor device, a part of the body contact layer placed at a long distance from the diode region is made larger than a part of the body contact layer placed at a short distance from the diode region.

Abstract: A Schottky barrier diode provided herein includes: a semiconductor substrate; and an anode electrode being in contact with the semiconductor substrate. The semiconductor substrate includes: p-type contact regions being in contact with the anode electrode; and an n-type drift region being in contact with the anode electrode by Schottky contact in a range where the p-type contact regions are not provided The p-type contact regions includes: a plurality of circular regions located so that the circular regions are arranged at intervals between an outer side and an inner side at a contact surface between the semiconductor substrate and the anode electrode; and an internal region located in an inner portion of the circular region located on an innermost side at the contact surface and connected to the circular region located on the innermost side at the contact surface.

Abstract: A semiconductor device includes a semiconductor substrate including a trench, a gate insulating layer, and a gate electrode. A step is arranged in a side surface of the trench. The semiconductor substrate includes first and second regions, a body region, and a side region. The body region extends from a position being in contact with the first region to a position located on the lower side with respect to the step. The body region is in contact with the gate insulating layer at a portion of the upper side surface located on a lower side with respect to the first region. The second region is located on a lower side of the body region and in contact with the gate insulating layer at the lower side surface. The side region is in contact with the gate insulating layer at the step surface and connected to the second region.

Abstract: A semiconductor device provided herein includes a trench in which a gate insulating layer (GIL) and a gate electrode are located. A step is provided in a lateral surface of the trench. The step surface descends toward a center of the trench. First and second regions are of a first conductivity type. A body region, a lateral region and a bottom region are of a second conductivity type. The first region, a body region, and the second region are in contact with the GIL at the upper lateral surface of the trench. The second region is in contact with the GIL at the lower lateral surface of the trench. A lateral region is in contact with the GIL at the lower lateral surface. A bottom region is in contact with the GIL at the bottom surface of the trench.

Abstract: A silicon carbide semiconductor device includes a MOSFET and a peripheral high-breakdown-voltage structure. A source region has a first recess. Trenches extend from the bottom of the first recess. A gate insulating film has an extension the shape of which follows the shape of the first recess. The surface of a gate electrode is positioned to be flush with or below the upper surface of the extension.

Abstract: A semiconductor device includes a semiconductor substrate having a main cell region and a sense cell region. A separation trench separating a main second semiconductor region from a sense second semiconductor region is provided in an upper surface of the semiconductor substrate. The semiconductor substrate includes a separation fourth semiconductor region being of a second conductivity type and separated from the main second semiconductor region and the sense second semiconductor substrate by a third semiconductor region.

Abstract: An insulated gate type switching device includes: a first region being of a first conductivity type; a body region being of a second conductivity type and in contact with the first region; a second region being of the first conductivity type and separated from the first region by the body region; an insulating film being in contact with the first region, the body region and the second region; and a gate electrode facing the body region via the insulating film. The body region includes a first body region and a second body region. The first body region has a theoretical threshold level Vth larger than that of the second body region.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first semiconductor element and a second semiconductor element in a semiconductor wafer. The first semiconductor element includes a first electrode formed on a front surface of the semiconductor wafer. The second semiconductor element is adjacent to the first semiconductor element and includes a second electrode formed on the front surface. The method further includes forming a first insulating layer on the front surface located at a first boundary portion between the first electrode and the second electrode; applying a specific potential different from a potential of the second electrode on the first electrode after the formation of the first insulating layer; and cutting the semiconductor wafer at the first boundary portion so as to divide the first semiconductor element from the second semiconductor element.

Abstract: A semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate is disclosed. The IGBT region includes: a body layer of a first conductivity type that is formed on a front surface of the semiconductor substrate; a body contact layer of the first conductivity type that is partially formed on a front surface of the body layer and has a higher impurity concentration of the first conductivity type than the body layer; an emitter layer of a second conductivity type that is partially formed on the front surface of the body layer; a drift layer; a collector layer; and a gate electrode. In the semiconductor device, a part of the body contact layer placed at a long distance from the diode region is made larger than a part of the body contact layer placed at a short distance from the diode region.

Abstract: A semiconductor device includes a semiconductor substrate having an element region and a termination region. The element region includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and first floating regions having the first conductivity type. The termination region includes FLR regions, a second drift region and second floating regions. The FLR regions have the first conductivity type and surrounds the element region. The second drift region has the second conductivity type, makes contact with and surrounds the FLR regions. The second floating regions have the first conductivity type and is surrounded by the second drift region. The second floating regions surround the element region. At least one of the second floating regions is placed at an element region side relative to the closest one of the FLR regions to the element region.

Abstract: A semiconductor device includes: a drift layer having a first conductivity type; a body layer having a second conductivity type; a first semiconductor region having the first conductivity type; a gate insulation film; a trench gate electrode; a first main electrode; a second semiconductor region having the second conductivity type; and a conductor region. The first main electrode is electrically connected with the body layer and the first semiconductor region. The second semiconductor region is disposed on a bottom part of the gate trench, and is surrounded by the drift layer. The conductor region is configured to electrically connect the first main electrode with the second semiconductor region and is configured to equalize, when the semiconductor device is in an off-state, a potential of the second semiconductor region and a potential of the first main electrode.

Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.