Abstract: A method of manufacturing a semiconductor device includes: forming a first trench in a first area of a drift layer that has a surface including the first area and a second area; growing a crystal of a p-type base layer on a surface of the drift layer after forming the first trench; and growing a crystal of an n-type source layer on a surface of the base layer. Material of the drift layer, the base layer, and the source layer are a wide-gap semiconductor.

Abstract: A semiconductor device includes: a drift layer having a first conductivity type; a body layer having a second conductivity type; a first semiconductor region having the first conductivity type; a gate insulation film; a trench gate electrode; a first main electrode; a second semiconductor region having the second conductivity type; and a conductor region. The first main electrode is electrically connected with the body layer and the first semiconductor region. The second semiconductor region is disposed on a bottom part of the gate trench, and is surrounded by the drift layer. The conductor region is configured to electrically connect the first main electrode with the second semiconductor region and is configured to equalize, when the semiconductor device is in an off-state, a potential of the second semiconductor region and a potential of the first main electrode.

Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.

Abstract: A method of manufacturing a semiconductor device includes forming an ohmic electrode in a first area on one of main surfaces of a silicon carbide layer, siliciding the ohmic electrode, and forming a Schottky electrode in a second area on the one of the main surfaces of the silicon carbide layer with self alignment. The second area is exposed where the ohmic electrode is not formed.

Abstract: A semiconductor device includes a semiconductor substrate having an element region and a termination region. The element region includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and first floating regions having the first conductivity type. The termination region includes FLR regions, a second drift region and second floating regions. The FLR regions have the first conductivity type and surrounds the element region. The second drift region has the second conductivity type, makes contact with and surrounds the FLR regions. The second floating regions have the first conductivity type and is surrounded by the second drift region. The second floating regions surround the element region. At least one of the second floating regions is placed at an element region side relative to the closest one of the FLR regions to the element region.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: A FET incorporating a Schottky diode has a structure allowing the ratio of an area in which the Schottky diode is formed and an area in which the FET is formed to be freely adjusted. A trench extending for a long distance is utilized. Schottky electrodes are interposed at positions appearing intermittently in the longitudinal direction of the trench. By taking advantage of the growth rate of a thermal oxide film formed on SiC being slower, and the growth rate of a thermal oxide film formed on polysilicon being faster, a structure can be obtained in which insulating film is formed between gate electrodes and Schottky electrodes, between the gate electrodes and a source region, between the gate electrodes and a body region, and between the gate electrodes and a drain region, and in which insulating film is not formed between the Schottky electrodes and the drain region.

Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.

Abstract: A method of manufacturing a semiconductor device includes forming an ohmic electrode in a first area on one of main surfaces of a silicon carbide layer, siliciding the ohmic electrode, and forming a Schottky electrode in a second area on the one of the main surfaces of the silicon carbide layer with self alignment. The second area is exposed where the ohmic electrode is not formed.

Abstract: A semiconductor device includes a first conductivity-type drift region including an exposed portion, a plurality of second conductivity-type body regions, a first conductivity-type source region, a gate portion and a Schottky electrode. The drift region is defined in a semiconductor layer, and the exposed portion exposes on a surface of the semiconductor layer. The body regions are disposed on opposite sides of the exposed portion. The source region is separated from the drift region by the body region. The gate portion is disposed to oppose the body region. The exposed portion is formed with a groove, and the Schottky electrode is disposed in the groove. The Schottky electrode has a Schottky contact with the exposed portion.

Abstract: A diode region and an IGBT region are formed in a semiconductor layer of a semiconductor device. A lifetime controlled region is formed in the semiconductor layer. In a plan view, the lifetime controlled region has a first lifetime controlled region located in the diode region and a second lifetime controlled region located in a part of the IGBT region. The second lifetime controlled region extends from a boundary of the diode region and the IGBT region toward the IGBT region. In the plan view, a tip of the second lifetime controlled region is located in a forming area of the body region in the IGBT region.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: A diode region and an IGBT region are formed in a semiconductor layer of a semiconductor device. A lifetime controlled region is formed in the semiconductor layer. In a plan view, the lifetime controlled region has a first lifetime controlled region located in the diode region and a second lifetime controlled region located in a part of the IGBT region. The second lifetime controlled region extends from a boundary of the diode region and the IGBT region toward the IGBT region. In the plan view, a tip of the second lifetime controlled region is located in a forming area of the body region in the IGBT region.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: IGBT 10 comprises an n+-type emitter region, an n?-type drift region, a p-type body region disposed between the emitter region and the drift region, a trench gate extending in the body region from the emitter region toward the drift region, and a projecting portion of an insulating material being in contact with a surface of the trench gate. At least a part of the projecting portion projects within the drift region.