Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Systems, computer-implemented methods, and techniques facilitating antenna-based thermal annealing of qubits are provided. In one example, a first antenna can be positioned above a superconducting qubit chip having a first Josephson junction and a second Josephson junction. The first antenna can direct a first electromagnetic wave toward the first Josephson junction. A first length of a first defined vertical gap, between the first antenna and the superconducting qubit chip, can be sized to cause the first electromagnetic wave to circumscribe a first set of one or more capacitor pads of the first Josephson junction, thereby annealing the first Josephson junction, without annealing the second Josephson junction. In another example, the first length of the first defined vertical gap can be a function of a model of the first electromagnetic wave as a cone, wherein the cone originates from the first antenna and extends toward the superconducting qubit chip.

Abstract: A technique relates to forming a sidewall tunnel junction. A first conducting layer is formed using a first shadow mask evaporation. A second conducting layer is formed on a portion of the first conducting layer, where the second conducting layer is formed using a second shadow mask evaporation. An oxide layer is formed on the first conducting layer and the second conducting layer. A third conducting layer is formed on part of the oxide layer, such that the sidewall tunnel junction is positioned between the first conducting layer and the third conducting layer.

Abstract: Techniques related to a three-dimensional integration for qubits on multiple height crystalline dielectric and method of fabricating the same are provided. A superconductor structure can comprise a first buried layer that can comprise a first patterned superconducting layer of a first wafer bonded to a second patterned superconducting layer of a second wafer. The superconductor structure can also comprise a patterned superconducting film attached to the second wafer. Further, the superconductor structure can comprise a second buried layer that can comprise a third patterned superconducting layer of a third wafer bonded to the patterned superconducting film that can be attached to the second wafer.

Abstract: Systems, computer-implemented methods, and techniques facilitating antenna-based thermal annealing of qubits are provided. In one example, a first antenna can be positioned above a superconducting qubit chip having a first Josephson junction and a second Josephson junction. The first antenna can direct a first electromagnetic wave toward the first Josephson junction. A first length of a first defined vertical gap, between the first antenna and the superconducting qubit chip, can be sized to cause the first electromagnetic wave to circumscribe a first set of one or more capacitor pads of the first Josephson junction, thereby annealing the first Josephson junction, without annealing the second Josephson junction. In another example, the first length of the first defined vertical gap can be a function of a model of the first electromagnetic wave as a cone, wherein the cone originates from the first antenna and extends toward the superconducting qubit chip.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Techniques for a vertical Josephson junction superconducting device using microstrip waveguides are provided. In one embodiment, a chip surface base device structure is provided that comprises a superconducting material located on a first side of a substrate, and a second superconducting material located on a second side of the substrate and stacked on a second substrate, wherein the first side of the substrate and the second side of the substrate are opposite sides. In one implementation, the substrate or the second substrate, or the substrate and the second substrate are crystalline silicon. In one implementation, the chip surface base device structure also comprises a transmon qubit comprising a capacitor and a Josephson junction formed in a via of the substrate and comprising a tunnel barrier. In one implementation, the chip surface base device structure also comprises a microstrip line electrically coupled to the transmon qubit.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A technique relates to correcting an area of overlap between two films created by sequential shadow mask evaporations. At least one process is performed of: correcting design features in an original layout to generate a corrected layout using a software tool, such that the corrected layout modifies shapes of the design features and correcting the design features in the original layout to generate the corrected layout using a lithographic tool, such that the corrected layout modifies the shapes of the design features. The modified shapes of the design features are patterned at locations on a wafer according to the corrected layout using the lithographic tool. A first film is deposited by an initial shadow mask evaporation and a second film by a subsequent shadow mask evaporation to produce corrected junctions at the locations on the wafer, such that the first film and the second film have an overlap.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: Systems and techniques facilitating antenna-based thermal annealing of qubits are provided. In one example, a radio frequency emitter, transmitter, and/or antenna can be positioned above a superconducting qubit chip having a Josephson junction coupled to a set of one or more capacitor pads. The radio frequency emitter, transmitter, and/or antenna can emit an electromagnetic signal onto the set of one or more capacitor pads. The capacitor pads can function as receiving antennas and therefore receive the electromagnetic signal. Upon receipt of the electromagnetic signal, an alternating current and/or voltage can be induced in the capacitor pads, which current and/or voltage thereby heat the pads and the Josephson junction. The heating of the Josephson junction can change its physical properties, thereby annealing the Josephson junction. In another example, the emitter can direct the electromagnetic signal to avoid unwanted annealing of neighboring qubits on the superconducting qubit chip.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: Techniques related to vertical silicon-on-metal superconducting quantum interference devices and method of fabricating the same are provided. Also provided are associated flux control and biasing circuitry. A superconductor structure can comprise a silicon-on-metal substrate that can comprise a first superconducting layer, comprising a first superconducting material, between a first crystalline silicon layer and a second crystalline silicon layer. The superconducting structure can also comprise a first via comprising a first Josephson junction and a second via comprising a second Josephson junction. The first via and the second via can be formed between the first superconducting layer and a second superconducting layer, comprising a second superconducting material.

Abstract: A technique relates to a superconducting chip. Resonant units have resonant frequencies, and the resonant units are configured as superconducting resonators. Josephson junctions are in the resonant units, and one or more of the Josephson junctions have a shorted tunnel barrier.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: Systems and techniques facilitating antenna-based thermal annealing of qubits are provided. In one example, a radio frequency emitter, transmitter, and/or antenna can be positioned above a superconducting qubit chip having a Josephson junction coupled to a set of one or more capacitor pads. The radio frequency emitter, transmitter, and/or antenna can emit an electromagnetic signal onto the set of one or more capacitor pads. The capacitor pads can function as receiving antennas and therefore receive the electromagnetic signal. Upon receipt of the electromagnetic signal, an alternating current and/or voltage can be induced in the capacitor pads, which current and/or voltage thereby heat the pads and the Josephson junction. The heating of the Josephson junction can change its physical properties, thereby annealing the Josephson junction. In another example, the emitter can direct the electromagnetic signal to avoid unwanted annealing of neighboring qubits on the superconducting qubit chip.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: Techniques related to a three-dimensional integration for qubits on crystalline dielectric and method of fabricating the same are provided. A superconductor structure can comprise a first wafer comprising a first crystalline silicon layer attached to a first patterned superconducting layer, and a second wafer comprising a second crystalline silicon layer attached to a second patterned superconducting layer. The second patterned superconducting layer of the second wafer can be attached to the first patterned superconducting layer of the first wafer. A buried layer can comprise the first patterned superconducting layer and the second patterned superconducting layer. The buried layer can comprise one or more circuits. The superconductor structure can also comprise a transmon qubit that can comprise a Josephson junction and one or more capacitor pads comprising superconducting material. The Josephson junction can comprise a first superconductor contact, a tunnel barrier layer, and a second superconductor contact.

Abstract: A structure including a plurality of laser discharge structures located on a planar lightwave circuit, and a single laser source connected to each of the plurality of laser discharge structures by one or more Mach Zehnder switches and a plurality of optical connections.