Patents by Inventor Samuel E. Bradshaw
Samuel E. Bradshaw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230033549Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.Type: ApplicationFiled: October 12, 2022Publication date: February 2, 2023Inventors: Samuel E. Bradshaw, Justin M. Eno, Sean Stephen Eilert, Shivasankar Gunasekaran, Hongyu Wang, Shivam Swami
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Publication number: 20230004502Abstract: Systems, methods and apparatuses of distributed computing based on memory as a service are described. For example, a set of networked computing devices can each be configured to execute an application that accesses memory using a virtual memory address region. Each respective device can map the virtual memory address region to the local memory for a first period of time during which the application is being executed in the respective device, map the virtual memory address region to a local memory of a remote device in the group for a second period of time after starting the application in the respective device and before terminating the application in the respective device, and request the remote device to process data in the virtual memory address region during at least the second period of time.Type: ApplicationFiled: September 13, 2022Publication date: January 5, 2023Inventors: Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Sean Stephen Eilert, Dmitri Yudanov
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Publication number: 20220413919Abstract: Enhancement or reduction of page migration can include operations that include scoring, in a computing device, each executable of at least a first group and a second group of executables in the computing device. The executables can be related to user interface elements of applications and associated with pages of memory in the computing device. For each executable, the scoring can be based at least partly on an amount of user interface elements using the executable. The first group can be located at first pages of the memory, and the second group can be located at second pages. When the scoring of the executables in the first group is higher than the scoring of the executables in the second group, the operations can include allocating or migrating the first pages to a first type of memory, and allocating or migrating the second pages to a second type of memory.Type: ApplicationFiled: August 29, 2022Publication date: December 29, 2022Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Publication number: 20220413900Abstract: Customized root processes for groups of applications in a computing device. A computing device (e.g., a mobile device) can monitor usage of applications. The device can then store data related to the usage of the applications, and group the applications into groups according to the stored data. The device can customize and execute a root process for a group of applications according to usage common to each application in the group. The device can generate patterns of prior executions shared amongst the applications in the group based on the stored data common to each application in the group, and execute the root process of the group according to the patterns. The device can receive a request to start an application from the group from a user of the device, and start the application upon receiving the request and by using the root process of the group of applications.Type: ApplicationFiled: August 30, 2022Publication date: December 29, 2022Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Publication number: 20220417326Abstract: Systems, methods and apparatuses to provide memory as a service are described. For example, a borrower device is configured to: communicate with a lender device; borrow an amount of memory from the lender device; expand memory capacity of the borrower device for applications running on the borrower device, using at least the local memory of the borrower device and the amount of memory borrowed from the lender device; and service accesses by the applications to memory via communication link between the borrower device and the lender device.Type: ApplicationFiled: August 30, 2022Publication date: December 29, 2022Inventors: Dmitri Yudanov, Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Sean Stephen Eilert
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Patent number: 11526450Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.Type: GrantFiled: March 4, 2021Date of Patent: December 13, 2022Assignee: Micron Technology, Inc.Inventors: Samuel E. Bradshaw, Shivasankar Gunasekaran, Hongyu Wang, Justin M. Eno
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Publication number: 20220391330Abstract: A memory chip having a first set of pins configured to allow the memory chip to be coupled to a first microchip or device via first wiring. The memory chip also having a second set of pins configured to allow the memory chip to be coupled to a second microchip or device via second wiring that is separate from the first wiring. The memory chip also having a data mover configured to facilitate access to the second microchip or device, via the second set of pins, to read data from the second microchip or device and write data to the second microchip or device. Also, a system having the memory chip, the first microchip or device, and the second microchip or device.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Inventors: Samuel E. Bradshaw, Shivam Swami, Sean Stephen Eilert, Justin M. Eno, Ameen D. Akel
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Patent number: 11494311Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.Type: GrantFiled: September 17, 2019Date of Patent: November 8, 2022Assignee: Micron Technology, Inc.Inventors: Samuel E. Bradshaw, Justin M. Eno, Sean S. Eilert, Shivasankar Gunasekaran, Hongyu Wang, Shivam Swami
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Patent number: 11481334Abstract: Systems, methods and apparatuses of distributed computing based on Memory as a Service are described. For example, a set of networked computing devices can each be configured to execute an application that accesses memory using a virtual memory address region. Each respective device can map the virtual memory address region to the local memory for a first period of time during which the application is being executed in the respective device, map the virtual memory address region to a local memory of a remote device in the group for a second period of time after starting the application in the respective device and before terminating the application in the respective device, and request the remote device to process data in the virtual memory address region during at least the second period of time.Type: GrantFiled: May 12, 2021Date of Patent: October 25, 2022Assignee: Micron Technology, Inc.Inventors: Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Sean Stephen Eilert, Dmitri Yudanov
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Patent number: 11474828Abstract: In a mobile device, processes of an application can be monitored and scored for initial data distribution. Specifically, a method can include monitoring processes of an application, and scoring objects or components used by the processes to determine placement of the objects or components in memory during initiation of the application. The method can also include, during initiation of the application, loading, into a first portion of the memory, at least partially, the objects or components scored at a first level. The method can also include, during initiation of the application, loading, into a second portion of the memory, at least partially, the objects or components scored at a second level. The objects or components scored at the second level can be less critical to the application than the objects or components scored at the first level.Type: GrantFiled: October 3, 2019Date of Patent: October 18, 2022Assignee: Micron Technology, Inc.Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Patent number: 11455242Abstract: A process for wear-leveling in a memory subsystem where references to invalidated chunks and a write count for each of the invalidated chunks of a memory subsystem are received by a wear-leveling manager. The wear-leveling manager orders the received references to the invalidated chunks of the memory subsystem in a tracking structure based on the write count of each of the invalidated chunks, and provides a reference to at least one of the invalidated chunks based on the ordering from the tracking structure to a write scheduler to service a write request, wherein the memory subsystem is wear-leveled by biasing the order of the invalidated chunks to prioritize low write count chunks.Type: GrantFiled: October 2, 2020Date of Patent: September 27, 2022Assignee: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Samuel E. Bradshaw
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Patent number: 11438414Abstract: Systems, methods and apparatuses to provide memory as a service are described. For example, a borrower device is configured to: communicate with a lender device; borrow an amount of memory from the lender device; expand memory capacity of the borrower device for applications running on the borrower device, using at least the local memory of the borrower device and the amount of memory borrowed from the lender device; and service accesses by the applications to memory via communication link between the borrower device and the lender device.Type: GrantFiled: May 28, 2019Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Dmitri Yudanov, Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Sean Stephen Eilert
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Patent number: 11436041Abstract: Customized root processes for groups of applications in a computing device. A computing device (e.g., a mobile device) can monitor usage of applications. The device can then store data related to the usage of the applications, and group the applications into groups according to the stored data. The device can customize and execute a root process for a group of applications according to usage common to each application in the group. The device can generate patterns of prior executions shared amongst the applications in the group based on the stored data common to each application in the group, and execute the root process of the group according to the patterns. The device can receive a request to start an application from the group from a user of the device, and start the application upon receiving the request and by using the root process of the group of applications.Type: GrantFiled: October 3, 2019Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Patent number: 11429445Abstract: Enhancement or reduction of page migration can include operations that include scoring, in a computing device, each executable of at least a first group and a second group of executables in the computing device. The executables can be related to user interface elements of applications and associated with pages of memory in the computing device. For each executable, the scoring can be based at least partly on an amount of user interface elements using the executable. The first group can be located at first pages of the memory, and the second group can be located at second pages. When the scoring of the executables in the first group is higher than the scoring of the executables in the second group, the operations can include allocating or migrating the first pages to a first type of memory, and allocating or migrating the second pages to a second type of memory.Type: GrantFiled: November 25, 2019Date of Patent: August 30, 2022Assignee: Micron Technology, Inc.Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Patent number: 11416422Abstract: A memory chip having a first set of pins configured to allow the memory chip to be coupled to a first microchip or device via first wiring. The memory chip also having a second set of pins configured to allow the memory chip to be coupled to a second microchip or device via second wiring that is separate from the first wiring. The memory chip also having a data mover configured to facilitate access to the second microchip or device, via the second set of pins, to read data from the second microchip or device and write data to the second microchip or device. Also, a system having the memory chip, the first microchip or device, and the second microchip or device.Type: GrantFiled: September 17, 2019Date of Patent: August 16, 2022Assignee: Micron Technology, Inc.Inventors: Samuel E. Bradshaw, Shivam Swami, Sean S. Eilert, Justin M. Eno, Ameen D. Akel
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Publication number: 20220237039Abstract: Systems, methods and apparatuses to throttle network communications for memory as a service are described. For example, a computing device can borrow an amount of random access memory of the lender device over a communication connection between the lender device and the computing device. The computing device can allocate virtual memory to applications running in the computing device, and configure at least a portion of the virtual memory to be hosted on the amount of memory loaned by the lender device to the computing device. The computing device can throttle data communications used by memory regions in accessing the amount of memory over the communication connection according to the criticality levels of the contents stored in the memory regions.Type: ApplicationFiled: April 19, 2022Publication date: July 28, 2022Inventors: Sean Stephen Eilert, Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Dmitri Yudanov
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Patent number: 11397654Abstract: A technique of receiving a write transaction directed to a group of memory parcels of a memory device from a client source. The technique determines a state of a first indicator used to indicate which one of two data structures contains a newer mapping of the group of memory parcels, while the other data structure contains an older mapping of the group of memory parcels. The technique determines a state of a second indicator used to indicate which one of the two data structures is in current use for the group of memory parcels and compares the states of the two indicators. When a data structure in current use does not contain the newer mapping, the technique changes the state of the second indicator to the state of the first indicator. The technique writes content of the write transaction to storage locations based on the newer mapping.Type: GrantFiled: October 16, 2020Date of Patent: July 26, 2022Assignee: MICRON TECHNOLOGY, INC.Inventors: Samuel E. Bradshaw, Justin Eno
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Patent number: 11373714Abstract: A group of sectors of a memory is provisioned for a logical volume such that an unprovisioned capacity of the memory interleaves at least a subset of the group of sectors to provide proximity disturb isolation. A request to access the memory is received, the request including a logical address within the logical volume. A sector within the group of sectors is identified, the sector corresponding to the logical address, and the requested access is performed in the sector within the group of sectors.Type: GrantFiled: August 21, 2018Date of Patent: June 28, 2022Assignee: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Samuel E. Bradshaw
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Publication number: 20220156201Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, data is stored in memory at one or more logical addresses allocated to an application by an operating system. The data is physically stored in a first memory device of a first memory type (e.g., NVRAM). The operating system determines an access pattern for the stored data. In response to determining the access pattern, the data is moved from the first memory device to a second memory device of a different memory type (e.g., DRAM).Type: ApplicationFiled: February 7, 2022Publication date: May 19, 2022Inventors: Kenneth Marion Curewitz, Sean S. Eilert, Hongyu Wang, Samuel E. Bradshaw, Shivasankar Gunasekaran, Justin M. Eno, Shivam Swami
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Patent number: 11334387Abstract: Systems, methods and apparatuses to throttle network communications for memory as a service are described. For example, a computing device can borrow an amount of random access memory of the lender device over a communication connection between the lender device and the computing device. The computing device can allocate virtual memory to applications running in the computing device, and configure at least a portion of the virtual memory to be hosted on the amount of memory loaned by the lender device to the computing device. The computing device can throttle data communications used by memory regions in accessing the amount of memory over the communication connection according to the criticality levels of the contents stored in the memory regions.Type: GrantFiled: May 28, 2019Date of Patent: May 17, 2022Assignee: Micron Technology, Inc.Inventors: Sean Stephen Eilert, Ameen D. Akel, Samuel E. Bradshaw, Kenneth Marion Curewitz, Dmitri Yudanov