Patents by Inventor Samuel J. Anderson

Samuel J. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10817185
    Abstract: A device, memory, method and system directed to fast data storage on a block storage device that reduces operational wear on the device. New data is written to an empty write block with a number of write blocks being reused. A location of the new data is tracked. Metadata associated with the new data is written. A lookup table may be updated based in part on the metadata. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: October 27, 2020
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Patent number: 10707327
    Abstract: A semiconductor device includes a semiconductor substrate including a doped region. A metal layer is formed on the doped region. An insulating layer covers the metal layer. The metal layer can serve as a buried metal layer which reduces electrical resistance between electrical charge in the doped region and adjacent contacts. The contacts can extend through the insulating layer between the buried metal layer and overlying metal stripes.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: July 7, 2020
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, David N. Okada, Samuel J. Anderson
  • Publication number: 20190165093
    Abstract: A semiconductor device has a substrate and a lightly doped drain (LDD) region formed in the substrate. A superjunction is formed in the LDD region.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 30, 2019
    Inventors: Patrick M. SHEA, Samuel J. ANDERSON, David N. OKADA
  • Patent number: 10248359
    Abstract: A system, method and apparatus directed to fast data storage on a block storage device. New data is written to an empty write block. If the new data is compressible, a compressed version of the new is written into the meta data. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address. Disk operations may use state data associated with the meta data to determine the empty write block. A write speed-limit may also be determined based on a lifetime period, a number of life cycles and a device-erase-sector-count for the device. A write speed for the device may be slowed based on the determined write speed-limit.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: April 2, 2019
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Patent number: 10199459
    Abstract: A semiconductor device has a substrate and a lightly doped drain (LDD) region formed in the substrate. A superjunction is formed in the LDD region.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: February 5, 2019
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, Samuel J. Anderson, David N. Okada
  • Patent number: 9640638
    Abstract: A semiconductor device has a substrate and gate structure over the substrate. A source region is formed in the substrate adjacent to the gate structure. A drain region in the substrate adjacent to the gate structure opposite the source region. An interconnect structure is formed over the substrate by forming a conductive plane electrically connected to the source region, and forming a conductive layer within openings of the conductive plane and electrically connected to the drain region. The interconnect structure can be formed as stacked conductive layers laid out in alternating strips. The conductive plane extends under a gate terminal of the semiconductor device. An insulating layer is formed over the substrate and a field plate is formed in the insulating layer. The field plate is electrically connected the source terminal. A stress relief layer is formed over a surface of the substrate opposite the gate structure.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: May 2, 2017
    Assignee: GREAT WALL SEMICONDUCTOR CORPORATION
    Inventors: Samuel J. Anderson, David N. Okada, Patrick M. Shea
  • Patent number: 9535830
    Abstract: A device, memory, method and system directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Grant
    Filed: July 26, 2015
    Date of Patent: January 3, 2017
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Publication number: 20160308015
    Abstract: A semiconductor device comprises a semiconductor substrate including a doped region. A metal layer is formed on the doped region. An insulating layer covers the metal layer.
    Type: Application
    Filed: December 28, 2015
    Publication date: October 20, 2016
    Applicant: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, David N. Okada, Samuel J. Anderson
  • Publication number: 20160211365
    Abstract: A semiconductor device has a substrate and a lightly doped drain (LDD) region formed in the substrate. A superjunction is formed in the LDD region.
    Type: Application
    Filed: March 25, 2016
    Publication date: July 21, 2016
    Applicant: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, Samuel J. Anderson, David N. Okada
  • Patent number: 9299774
    Abstract: A semiconductor device has a substrate and a gate formed over the substrate. An LDD region is formed in the substrate adjacent to the gate. A superjunction is formed in the LDD region while a portion of the LDD region remains between the superjunction and gate. A mask is formed over the substrate. A first region is doped with a first type of dopant using the mask. A stripe is doped with a second type of dopant using a portion of the mask. A drain contact region is formed in the substrate. The first region extends to the drain contact region. The first region and stripe are formed using chain implants. A source field plate and drain field plate are formed over the substrate. A trench is formed in the substrate. A source contact region is formed in the trench.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: March 29, 2016
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, Samuel J. Anderson, David N. Okada
  • Publication number: 20150331791
    Abstract: A device, memory, method and system directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Application
    Filed: July 26, 2015
    Publication date: November 19, 2015
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Patent number: 9092325
    Abstract: A method, device and system directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: July 28, 2015
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Patent number: 9018706
    Abstract: A cell phone has a plurality of interconnected electronic components for performing the electrical functions of the phone. A DC/DC converter provides an operating voltage which is applied to power supply terminals of the plurality of interconnected electronic components. The DC/DC converter uses a monolithic semiconductor device containing a power metal oxide semiconductor field effect transistor (MOSFET) and Schottky diode. The semiconductor device has the lateral diffused MOSFET formed on a surface of the semiconductor device. The MOSFET is formed with a plurality conduction fingers. The Schottky diode is also formed on the surface of the semiconductor device and integrated between the plurality of conduction fingers of the MOSFET. The drain of the MOSFET is connected to the anode of the diode on the surface of the monolithic semiconductor device.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: April 28, 2015
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Samuel J. Anderson, David N. Okada
  • Patent number: 9006099
    Abstract: A semiconductor device has a substrate with a source region and a drain region formed on the substrate. A silicide layer is disposed over the source region and drain region. A first interconnect layer is formed over the silicide layer and includes a first runner connected to the source region and second runner connected to the drain region. A second interconnect layer is formed over the first interconnect layer and includes a third runner connected to the first runner and a fourth runner connected to the second runner. An under bump metallization (UBM) is formed over and electrically connected to the second interconnect layer. A mask is disposed over the substrate with an opening in the mask aligned over the UBM. A conductive bump material is deposited within the opening in the mask. The mask is removed and the conductive bump material is reflowed to form a bump.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Samuel J. Anderson, David N. Okada
  • Publication number: 20150021686
    Abstract: A semiconductor device has a substrate and a gate formed over the substrate. An LDD region is formed in the substrate adjacent to the gate. A superjunction is formed in the LDD region while a portion of the LDD region remains between the superjunction and gate. A mask is formed over the substrate. A first region is doped with a first type of dopant using the mask. A stripe is doped with a second type of dopant using a portion of the mask. A drain contact region is formed in the substrate. The first region extends to the drain contact region. The first region and stripe are formed using chain implants. A source field plate and drain field plate are formed over the substrate. A trench is formed in the substrate. A source contact region is formed in the trench.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 22, 2015
    Inventors: Patrick M. Shea, Samuel J. Anderson, David N. Okada
  • Patent number: 8921186
    Abstract: A semiconductor device has a buried oxide layer formed over a substrate. An active silicon layer is formed over the buried oxide layer. A drain region is formed in the active silicon layer. An LDD drift region is formed in the active silicon layer adjacent to the drain region. The drift region has a graded doping distribution. A co-implant region is formed in the active silicon. A source region is formed in the co-implant region. A shallow trench insulator is formed along a top surface of the LDD drift region. The shallow trench isolator has a length less than the LDD drift region. The shallow trench insulator terminates under the polysilicon gate and within the LDD drift region. A polysilicon gate is formed above the active silicon layer between the source region and LDD drift region and at least partially overlapping the shallow trench insulator.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: December 30, 2014
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Patrick M. Shea, Samuel J. Anderson, David N. Okada
  • Publication number: 20140372683
    Abstract: A method, device and system directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Application
    Filed: August 18, 2014
    Publication date: December 18, 2014
    Inventors: Douglas Dumitru, Samuel J. Anderson
  • Patent number: 8895430
    Abstract: A semiconductor device has a semiconductor wafer with a plurality of semiconductor die including a plurality of contact pads. An insulating layer is formed over the semiconductor wafer and contact pads. An under bump metallization (UBM) is formed over and electrically connected to the plurality of contact pads. A mask is disposed over the semiconductor wafer with a plurality of openings aligned over the plurality of contact pads. A conductive bump material is deposited within the plurality of openings in the mask and onto the UBM. The mask is removed. The conductive bump material is reflowed to form a plurality of bumps with a height less than a width. The plurality of semiconductor die is singulated. A singulated semiconductor die is mounted to a substrate with bumps oriented toward the substrate. Encapsulant is deposited over the substrate and around the singulated semiconductor die.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: November 25, 2014
    Assignee: Great Wall Semiconductor Corporation
    Inventors: Samuel J. Anderson, Gary Dashney, David N. Okada
  • Publication number: 20140231901
    Abstract: A cell phone has a plurality of interconnected electronic components for performing the electrical functions of the phone. A DC/DC converter provides an operating voltage which is applied to power supply terminals of the plurality of interconnected electronic components. The DC/DC converter uses a monolithic semiconductor device containing a power metal oxide semiconductor field effect transistor (MOSFET) and Schottky diode. The semiconductor device has the lateral diffused MOSFET formed on a surface of the semiconductor device. The MOSFET is formed with a plurality conduction fingers. The Schottky diode is also formed on the surface of the semiconductor device and integrated between the plurality of conduction fingers of the MOSFET. The drain of the MOSFET is connected to the anode of the diode on the surface of the monolithic semiconductor device.
    Type: Application
    Filed: April 24, 2014
    Publication date: August 21, 2014
    Applicant: Great Wall Semiconductor Corporation
    Inventors: Samuel J. Anderson, David N. Okada
  • Patent number: 8812778
    Abstract: A device, method and system is directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: August 19, 2014
    Inventors: Douglas Dumitru, Samuel J. Anderson