Patents by Inventor Sandeep Bhatia

Sandeep Bhatia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070216808
    Abstract: Presented herein are systems and methods for scaling. In one embodiment, there is presented a method for scaling. The method comprises receiving a top field and a bottom field, detecting whether the top field and bottom field correspond to the same time period, and generating a scaled field for display using both the top field and bottom field, if the top field and the bottom field correspond to the same time period.
    Type: Application
    Filed: October 18, 2006
    Publication date: September 20, 2007
    Inventors: Alexander MacInnis, Greg Kranawetter, Sandeep Bhatia, Robin (Shen-yung) Chen, Mahadhevan Sivagururaman, Srilakshmi Dorarajulu
  • Publication number: 20070098072
    Abstract: A system, method, and apparatus for reducing the video decoder processing requirements are presented herein. During a rewind operation, a reference picture for a group of pictures is decoded and stored into a reference frame buffer. By storing a reference picture for the group, the reference picture need not be decoded to display each picture in the group during the rewind operation.
    Type: Application
    Filed: December 7, 2006
    Publication date: May 3, 2007
    Inventors: Gaurav Aggarwal, Arun Rao, Girish Hulmani, Marcus Kellerman, David Erickson, Jason Demas, Sandeep Bhatia
  • Patent number: 7149248
    Abstract: A system, method, and apparatus for reducing the video decoder processing requirements are presented herein. During a rewind operation, a reference picture for a group of pictures is decoded and stored into a reference frame buffer. By storing a reference picture for the group, the reference picture need not be decoded to display each picture in the group during the rewind operation.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: December 12, 2006
    Assignee: Broadcom Corporation
    Inventors: Gaurav Aggarwal, Arun Gopalakrishna Rao, Marcus Kellerman, David Erickson, Jason Demas, Sandeep Bhatia, Girish Hulmani
  • Publication number: 20060268012
    Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.
    Type: Application
    Filed: August 3, 2006
    Publication date: November 30, 2006
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, Greg Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar
  • Patent number: 7110006
    Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: September 19, 2006
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, Greg A. Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar
  • Publication number: 20060133251
    Abstract: Presented herein is a system, method, and apparatus for audio and video synchronization. In one embodiment, there is presented a method for displaying audio data and video data. The method comprises examining a plurality of portions of the audio data, where each of said plurality of portions of audio data is associated with a time stamp; examining a plurality of portions of the video data, where each of said plurality of portions of the video data is associated with a time stamp; decoding one of the portions of the video data; and decoding one of the portions of the audio data while decoding the one of the portions of the video data. The difference between the time stamp associated with the one of the portions of the video data and the time stamp associated with the one of the portions of the audio data is within a certain margin of error from a predetermined offset.
    Type: Application
    Filed: December 20, 2004
    Publication date: June 22, 2006
    Inventors: Arul Thangaraj, Sandeep Bhatia
  • Publication number: 20060133515
    Abstract: Presented herein are system(s), method(s), and apparatus for determining the presentation time for a picture without a presentation time stamp. A first and second picture are decoded. The first picture is a reference picture for the second picture. The presentation time for the second pictures is computed as a function of a presentation time and a decode time for the first picture.
    Type: Application
    Filed: December 22, 2004
    Publication date: June 22, 2006
    Inventors: Srinivas MPR, Sherman Chen, Sandeep Bhatia
  • Publication number: 20060103344
    Abstract: According to some embodiments, power is stored in a first power storage unit located at a first computing device. The power is then provided from the first power storage unit to a second computing device, wherein the second computing device is external to the first computing device, and wherein the first and second computing devices are the same type of device.
    Type: Application
    Filed: November 17, 2004
    Publication date: May 18, 2006
    Inventors: Vishwa Hassan, Sandeep Bhatia
  • Publication number: 20060093225
    Abstract: Presented herein are systems, methods, and apparatus for simultaneously providing full size video and massively scaled down video using inconification. In one embodiment, there is presented a method for providing a video output. The method comprises decoding an encoded picture, thereby resulting in a decoded picture; reducing the decoded picture, thereby resulting in a reduced picture; storing the reduced picture; and encoding the reduced picture, thereby resulting in a synthetic picture.
    Type: Application
    Filed: October 29, 2004
    Publication date: May 4, 2006
    Inventors: Sandeep Bhatia, Srinivasa Mogathala Reddy, Sivugururaman Mahadevan
  • Publication number: 20060095819
    Abstract: A method and system for system for clock skew independent scan chains are disclosed. In one embodiment, a method comprises connecting a plurality of mux-D scan registers in a chain configuration, wherein a first mux-D scan register of the plurality is associated with a first clock network, and a second mux-D scan register of the plurality is associated with a second clock network. The plurality of mux-D scan registers have a scan mode. The first mux-D scan register and the second mux-D scan register become clock skew independent by controlling a scan-enable signal and a clock signal.
    Type: Application
    Filed: March 16, 2005
    Publication date: May 4, 2006
    Inventor: Sandeep Bhatia
  • Patent number: 7002494
    Abstract: Present herein is a low memory and MIPS efficient technique for decoding Huffman codes using multi-stage, multi-bits lookup at different levels. A binary tree is cut at levels depending on the quotient of the number of existing nodes and the number of possible nodes.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: February 21, 2006
    Assignee: Broadcom Corporation
    Inventors: Manoj Singhal, Sandeep Bhatia, Srinivasa Mpr
  • Patent number: 6983017
    Abstract: A method and apparatus are provided for implementing an enhanced reduced memory mode (RMM) of decoding HDTV MPEG-2 video stream. In one instance, the RMM mode is adaptively enabled with up/down conversion by using the picture-type information. In another instance, the RMM mode is provided by performing anchor-frame compression/decompression by using adaptive DPCM technique with picture-type information. The quantization (PCM) tables are generated using the Lloyd algorithm. Further, the predictor for each pixel is determined by a use of the Graham rule.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: January 3, 2006
    Assignee: Broadcom Corporation
    Inventors: Sherman (Xuemin) Chen, Jason Demas, Sandeep Bhatia
  • Publication number: 20050286639
    Abstract: Presented herein are systems and methods for pause and freeze functions for digital video streams. A particular picture is displayed for a plurality of video display periods. A next picture is displayed at the video display period immediately following the plurality of video display periods, the next picture immediately following the particular picture in a display order. A system clock reference is loaded with a time stamp associated with the next picture when displaying the next picture.
    Type: Application
    Filed: June 23, 2004
    Publication date: December 29, 2005
    Inventors: Gaurav Aggarwal, M.K. Subramanian, Sandeep Bhatia, Santosh Savekar, K. Shivapirakasan
  • Publication number: 20050281342
    Abstract: Presented herein are systems and methods for slow motion and high speed for digital video. In one embodiment, there is presented a method for displaying pictures. The method comprises displaying a top field from a particular picture, for a predetermined number of consecutive vertical synchronization pulses; and displaying a bottom field from the particular picture for the predetermined number of consecutive vertical synchronization pulses.
    Type: Application
    Filed: June 22, 2004
    Publication date: December 22, 2005
    Inventors: Gaurav Aggarwal, M.K. Subramanian, Sandeep Bhatia, Santosh Savekar, K. Shivapirakasan
  • Patent number: 6975324
    Abstract: A video and graphics system includes a data transport processor for receiving compressed data streams, a video transport processor for extracting video data, and an audio decode processor for extracting audio data. The data transport processor provides PCRs to the video transport processor and the audio decode processor. The video transport-processor stores the video data in external memory and generates a start code table to index the video data stored the external memory. In the start code table SLICEs of the video data are aligned to a suitable boundary. The compressed data streams may include MPEG Transport streams, and the video data may include SDTV or HDTV data. The video and graphics system may be implemented on an integrated circuit chip.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: December 13, 2005
    Assignee: Broadcom Corporation
    Inventors: Ramanujan K. Valmiki, Sandeep Bhatia
  • Publication number: 20050271145
    Abstract: A method and apparatus are provided for implementing an enhanced reduced memory mode (RMM) of decoding HDTV MPEG-2 video stream. In one instance, the RMM mode is adaptively enabled with up/down conversion by using the picture-type information. In another instance, the RMM mode is provided by performing anchor-frame compression/decompression by using adaptive DPCM technique with picture-type information. The quantization (PCM) tables are generated using the Lloyd algorithm. Further, the predictor for each pixel is determined by a use of the Graham rule.
    Type: Application
    Filed: August 15, 2005
    Publication date: December 8, 2005
    Inventors: Sherman Chen, Jason Demas, Sandeep Bhatia
  • Publication number: 20050175106
    Abstract: Presented herein is a unified decoder architecture. A system comprises a video decoder, instruction memory, and a host processor. The video decoder decodes the video data encoded with the particular standard. The instruction memory stores a first set of instructions and a second set of instructions. The first set of instructions are for decoding encoded video data according to a first encoding standard. The second set of instruction are for decoding encoded video data according to a second encoding standard. The host processor provides an indication to the video decoder indicating the particular encoding standard. The video decoder executes the first set of instructions if the indication indicates that the particular encoding standard is the first encoding standard and executes the second set of instructions if the indication indicates that the particular encoding standard is the second encoding standard.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 11, 2005
    Inventors: Ravindra Bidnur, Ramadas Pai, Bhaskar Sherigar, Aniruddha Sane, Sandeep Bhatia, Gaurav Agarwal
  • Publication number: 20050175082
    Abstract: A system and method that support display of video fields using related data encoded in data structures. Each data structure is associated with one video field and contains all the information associated with the display of the video field. The data structure is encoded with the video field that is displayed exactly one field prior to the field associated with the data structure. In an embodiment of the present invention, the data structure contains all the information associated with the display of a video field, regardless of whether certain data changes from one field to the next.
    Type: Application
    Filed: December 29, 2004
    Publication date: August 11, 2005
    Inventors: Jason Herrick, Darren Neuman, Greg Kranawetter, Sandeep Bhatia
  • Publication number: 20050122335
    Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.
    Type: Application
    Filed: November 23, 2004
    Publication date: June 9, 2005
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, Greg Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar
  • Publication number: 20050099326
    Abstract: Present herein is a low memory and MIPS efficient technique for decoding Huffman codes using multi-stage, multi-bits lookup at different levels. A binary tree is cut at levels depending on the quotient of the number of existing nodes and the number of possible nodes.
    Type: Application
    Filed: November 23, 2004
    Publication date: May 12, 2005
    Inventors: Manoj Singhal, Sandeep Bhatia, Srinivasa Mpr