Patents by Inventor Sang Choon Ko
Sang Choon Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10848074Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.Type: GrantFiled: September 11, 2019Date of Patent: November 24, 2020Assignee: Electronics and Telecommunications Research InstituteInventors: Chi Hoon Jun, Sang Choon Ko, Dong Yun Jung, Jong-Moon Park, Hyun-Gyu Jang
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Publication number: 20200119654Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.Type: ApplicationFiled: September 11, 2019Publication date: April 16, 2020Applicant: Electronics and Telecommunications Research InstituteInventors: Chi Hoon JUN, Sang Choon KO, Dong Yun JUNG, Jong-Moon PARK, Hyun-Gyu JANG
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Patent number: 10020201Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.Type: GrantFiled: April 8, 2016Date of Patent: July 10, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
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Patent number: 10014401Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.Type: GrantFiled: January 24, 2017Date of Patent: July 3, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jeho Na, Hyung Seok Lee, Chi Hoon Jun, Sang Choon Ko, Myungjoon Kwack, Young Rak Park, Woojin Chang, Hyun-Gyu Jang, Dong Yun Jung
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Patent number: 9905654Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.Type: GrantFiled: July 20, 2016Date of Patent: February 27, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Yun Jung, Hyun Soo Lee, Sang Choon Ko, Minki Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Hyung Seok Lee, Hyun-Gyu Jang, Chi Hoon Jun
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Patent number: 9825622Abstract: A cascode switch circuit includes a first transistor, a second transistor, and a protector. A first transistor receives a signal from a first terminal through a first end and transfers the signal to a second end in response to a first control signal. A second transistor delivers the signal that the first transistor transfers to a second terminal in response to a second control signal. A protector is connected between a gate of the first transistor and the second terminal. The first control signal is provided to allow the first transistor to operate in a normally-on state. The second control signal is provided to allow the second transistor to operate in a normally-off state.Type: GrantFiled: July 22, 2016Date of Patent: November 21, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Woojin Chang, Sang Choon Ko, Jae Kyoung Mun, Young Rak Park
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Patent number: 9800181Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.Type: GrantFiled: October 21, 2016Date of Patent: October 24, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon Jun, Sang Choon Ko, Minki Kim, Jeho Na, Young Rak Park, Junbo Park, Hyun Soo Lee, Hyung Seok Lee, Hyun-Gyu Jang, Dong Yun Jung
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Patent number: 9755027Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.Type: GrantFiled: September 14, 2016Date of Patent: September 5, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Hyung Seok Lee, Ki Hwan Kim, Sang Choon Ko, Zin-Sig Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Chi hoon Jun, Dong Yun Jung
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Patent number: 9748941Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.Type: GrantFiled: July 29, 2016Date of Patent: August 29, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Minki Kim, Hyun-Gyu Jang, Dong Yun Jung, Sang Choon Ko, Hyun Soo Lee, Chi Hoon Jun
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Publication number: 20170213904Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.Type: ApplicationFiled: January 24, 2017Publication date: July 27, 2017Applicant: Electronics and Telecommunications Research InstituteInventors: Jeho NA, Hyung Seok LEE, Chi Hoon JUN, Sang Choon KO, Myungjoon KWACK, Young Rak PARK, Woojin CHANG, Hyun-Gyu JANG, Dong Yun JUNG
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Publication number: 20170201247Abstract: A cascode switch circuit includes a first transistor, a second transistor, and a protector. A first transistor receives a signal from a first terminal through a first end and transfers the signal to a second end in response to a first control signal. A second transistor delivers the signal that the first transistor transfers to a second terminal in response to a second control signal. A protector is connected between a gate of the first transistor and the second terminal. The first control signal is provided to allow the first transistor to operate in a normally-on state. The second control signal is provided to allow the second transistor to operate in a normally-off state.Type: ApplicationFiled: July 22, 2016Publication date: July 13, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Woojin CHANG, Sang Choon KO, Jae Kyoung MUN, Young Rak PARK
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Publication number: 20170141704Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.Type: ApplicationFiled: October 21, 2016Publication date: May 18, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon JUN, Sang Choon KO, Minki KIM, Jeho NA, Young Rak PARK, Junbo PARK, Hyun Soo LEE, Hyung Seok LEE, Hyun-Gyu JANG, Dong Yun JUNG
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Publication number: 20170117889Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.Type: ApplicationFiled: July 29, 2016Publication date: April 27, 2017Applicant: Electronics and Telecommunications Research InstituteInventors: Minki KIM, Hyun-Gyu JANG, Dong Yun JUNG, Sang Choon KO, Hyun Soo LEE, Chi Hoon JUN
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Patent number: 9613884Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.Type: GrantFiled: October 1, 2015Date of Patent: April 4, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon Jun, Jeho Na, Dong Yun Jung, Sang Choon Ko, Eun Soo Nam, Hyung Seok Lee
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Publication number: 20170077282Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.Type: ApplicationFiled: September 14, 2016Publication date: March 16, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Hyung Seok LEE, Ki Hwan KIM, Sang Choon KO, Zin-Sig KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Chi Hoon JUN, Dong Yun JUNG
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Publication number: 20170062385Abstract: Disclosed is a power converting device including: a first laminate having a plurality of non-magnetic substrates which are laminated; electronic devices disposed on at least one of the non-magnetic substrates; first conductive patterns disposed on the non-magnetic substrate on which the electronic devices are disposed, the first conductive patterns being connected to the electronic devices; at least one via electrode connecting the respective first conductive patterns to each other; a second laminate disposed on one side of the first laminate and having a plurality of magnetic sheets which are laminated; second conductive patterns disposed on at least two magnetic sheets among the plurality of magnetic sheets; and at least one via electrode connecting the respective second conductive patterns to each other, wherein the first and second via electrodes are connected to each other.Type: ApplicationFiled: July 27, 2016Publication date: March 2, 2017Applicant: Electronics and Telecommunications Research InstituteInventors: Dong Yun JUNG, Sang Choon KO, Chi Hoon JUN, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyun Soo LEE, Hyung Seok LEE, Hyun-Gyu JANG
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Publication number: 20170025550Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.Type: ApplicationFiled: July 20, 2016Publication date: January 26, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyung Seok LEE, Hyun-Gyu JANG, Chi Hoon JUN
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Publication number: 20160380119Abstract: A first nitride semiconductor layer of a semiconductor device is provided on a substrate, a second nitride semiconductor layer is provided on the first nitride semiconductor layer, a first ohmic metal and a second ohmic metal are provided on the second nitride semiconductor layer, a recess region is provided in the second nitride semiconductor layer between the first ohmic metal and the second ohmic metal, a passivation layer covers side of the first ohmic metal and a bottom surface and sides of the recess region, and a Schottky electrode is provided on the first ohmic metal and extends into the recess region.Type: ApplicationFiled: March 30, 2016Publication date: December 29, 2016Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Jeong-Jin KIM, Zin-Sig KIM, Jeho NA, Eun Soo NAM, Jae Kyoung MUN, Young Rak PARK, Sung-Bum BAE, Hyung Seok LEE, Woojin CHANG, Hyungyu JANG, Chi Hoon JUN
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Patent number: 9490214Abstract: A semiconductor device may include a substrate having a lower via-hole, an epitaxial layer having an opening exposing a top surface of the substrate, a semiconductor chip disposed on the top surface of the substrate and including first, second, and third electrodes, an upper metal layer connected to the first electrode, a supporting substrate disposed on the upper metal layer and having an upper via-hole, an upper pad disposed on the substrate and extending into the upper via-hole, a lower pad connected to the second electrode in the opening, and a lower metal layer covering a bottom surface of the substrate and connected to the lower pad through the lower via-hole.Type: GrantFiled: September 4, 2015Date of Patent: November 8, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Byoung-Gue Min, Sang Choon Ko, Jong-Won Lim, Hokyun Ahn, Hyung Sup Yoon, Jae Kyoung Mun, Eun Soo Nam
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Publication number: 20160260653Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.Type: ApplicationFiled: October 1, 2015Publication date: September 8, 2016Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon JUN, Jeho NA, Dong Yun JUNG, Sang Choon KO, Eun Soo NAM, Hyung Seok LEE