Patents by Inventor Sang-Chul Kim
Sang-Chul Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8031772Abstract: Disclosed herein is a video decoding system of a mobile broadcasting receiver. The video decoding system of a mobile broadcasting receiver for decoding a compression-coded video signal includes: at least one buffer memory for performing video decoding; a plurality of coprocessors including a data processing unit partitioned into one or more hardware blocks, wherein the data processing unit performs actual video decoding via data input/output from/to the buffer memory; and a DMA (Direct Memory Access) coprocessor for performing a direct access operation to an external memory, wherein, the at least one buffer memory, the plurality of coprocessors and the DMA coprocessor take the form of hardware, and operations thereof are controlled via software in a processor.Type: GrantFiled: November 16, 2005Date of Patent: October 4, 2011Assignee: LG Electronics Inc.Inventor: Sang Chul Kim
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Patent number: 7968965Abstract: Embodiments relate to a semiconductor device and a method for fabricating the same. According to embodiments, a semiconductor device may include a first device, a silicon epitaxial layer formed on and/or over the first device, a second device formed on and/or over the silicon epitaxial layer, and a connection via formed through the silicon epitaxial layer, which may electrically interconnect the first device and the second device. According to embodiments, a method for fabricating a semiconductor device may include forming a first device, forming a silicon epitaxial layer on and/or over the first device, forming a connection via through the silicon epitaxial layer, and forming a second device on and/or over the silicon epitaxial layer such that the second device may be electrically connected to the connection via.Type: GrantFiled: December 14, 2008Date of Patent: June 28, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Sang-Chul Kim
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Publication number: 20110051719Abstract: Methods and systems for providing company call service in wireless and wired integrated network are provided. For example, a call between an employee's wireless device and a client's device can be connected while indicating the employee's wired telephone number as a caller's telephone number. When an employee is receiving a call, one example is to call an employee's wired device first, and if there is no response, employee's wireless device may be called subsequently. In another example, employee's wired and wireless device may be called simultaneously.Type: ApplicationFiled: August 26, 2010Publication date: March 3, 2011Inventors: Han-Wook Jung, Sang-Ho Koh, Seung-Hoon Beak, Young-Chae Lim, Sang-Chul Kim, Hyun-Ik Lee, Won-Chul Kim, Kyoung-Jin Moon, Joon-Ho Lee
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Patent number: 7875843Abstract: An image sensor and a method for fabricating the same having enhanced sensivity. The image sensor enhances sensitivity and minimizes optical loss by isolating color filters from each other using a metal that has superior light reflection properties while having no effect on the color filters during deposition of the metal.Type: GrantFiled: September 3, 2008Date of Patent: January 25, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Sang-Chul Kim
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Patent number: 7846777Abstract: A semiconductor device package and fabricating method thereof are disclosed, by which heat-dissipation efficiency is enhanced in a system by interconnection (SBI) structure. An exemplary semiconductor device package may include a substrate, at least two chips mounted on the substrate to have a space between one or more of the chips and an edge of the substrate, an insulating layer covering the chips, the insulating layer having via holes exposing portions of the at least two chips and a trench between the via holes, the insulating layer having at least two hole patterns within the space, and a metal layer filling the via holes and the trench.Type: GrantFiled: July 18, 2008Date of Patent: December 7, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Sang Chul Kim
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Publication number: 20100194998Abstract: An apparatus for processing images includes a de-multiplexer, a first decoder, a thumbnail generator and an encoder. The de-multiplexer receives a data stream, the de-multiplexer de-multiplexing a video signal and a channel information from the data stream. A first decoder decodes the video signal to provide a decoded video signal including at least one of Predicted frame, (P-frame), Intra frame (I-frame) or Bi-directional frame (B-frame). The thumbnail generator is coupled to the first decoder, and the thumbnail generator generates at least one of a still picture thumbnail or a moving picture thumbnail based on the decoded video signal. The still picture thumbnail and the moving picture thumbnail have at least one of a smaller resolution or a smaller data size than the decoded video signal. The encoder is coupled to the thumbnail generator and the de-multiplexer.Type: ApplicationFiled: January 4, 2010Publication date: August 5, 2010Applicant: LG Electronics Inc.Inventors: Kun-Sik LEE, Yoon-Jung KIM, Hae-Jin BAE, Gyu-Seung KIM, Sang-Chul KIM, Sang-Kil PARK, Jae-Kyung LEE, Jin-Gyeong KIM, Tae-Il CHUNG
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Patent number: 7767481Abstract: Disclosed are an image sensor and a method for manufacturing the same, capable of increasing a light absorbing coefficient by forming a rough surface on a photodiode. The image sensor includes a semiconductor substrate with a plurality of photodiodes thereon having rough upper surfaces, a dielectric layer on the semiconductor substrate, a color filter layer on the dielectric layer, a planarization layer on an entire surface of the semiconductor substrate including the color filter layer, and a plurality of micro-lenses formed on the planarization layer to correspond to the color filter layer.Type: GrantFiled: December 27, 2006Date of Patent: August 3, 2010Assignee: Dongbu Electronics Co., Ltd.Inventors: Sang Chul Kim, Jae Won Han
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Publication number: 20100164090Abstract: A semiconductor package apparatus includes a first semiconductor chip bonded onto a substrate of which metal wire turning upward; and a second semiconductor chip conductively bonded onto the first semiconductor chip in a vertical direction such that a metal wire of the second semiconductor chip and the metal wire of the first semiconductor chip have facing points. The semiconductor package apparatus includes a third semiconductor chip conductively bonded onto the first semiconductor chip in the vertical direction to be disposed horizontally with the second semiconductor chip such that a metal wire of the third semiconductor chip and the metal wire of the first semiconductor chip have facing points.Type: ApplicationFiled: December 27, 2009Publication date: July 1, 2010Inventor: Sang-Chul Kim
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Publication number: 20100140806Abstract: A method for forming a super contact in a semiconductor device is disclosed. The method enables forming a barrier film selectively on the silicon substrate, leaving the metal contact exposed for perfect isolation of the metal pad from the silicon substrate after formation of the super contact.Type: ApplicationFiled: December 1, 2009Publication date: June 10, 2010Inventor: Sang Chul KIM
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Publication number: 20100135854Abstract: Provided are a biosensor and a method of fabricating the same. The biosensor has a transistor structure including a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, source and drain electrodes formed on the gate insulating layer, and a channel region formed between the source and drain electrodes. Here, the channel region includes an active layer formed of an active polymer sensing an antigen-antibody reaction and a hydrophilic nano particle. The active layer is formed through direct printing, for example, inkjet printing. The biosensor having such a structure can be increased in reactivity between an antigen and an antibody and hydrophilicity to improve the sensor's characteristics, fabricated in a large-area process using direct printing, and further facilitates formation of devices on various substrates formed of, for example, plastic.Type: ApplicationFiled: August 5, 2009Publication date: June 3, 2010Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Suk YANG, Seong Hyun Kim, Sang Chul Kim, Doo Hyeb Youn, Zin Sig Kim
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Publication number: 20100119700Abstract: Disclosed is a method for forming a metal line. The method includes preparing a semiconductor substrate having a first metal line, performing an oxidation process with respect to the first metal line, performing an oxide removal process to remove an oxide generated in the oxidation process, forming an etch stop layer on the metal line, forming an interlayer dielectric layer on the first metal line, and forming a damascene pattern on the interlayer dielectric layer, and forming a second metal line, which is connected with the first metal line, in the damascene pattern. The oxidation process for the first metal line can include a hydrogen peroxide treatment process using a solution including oxygen. The oxide removal process can be performed by using an oxalic acid (HOOC-COOH) solution.Type: ApplicationFiled: October 29, 2009Publication date: May 13, 2010Inventor: SANG CHUL KIM
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Publication number: 20100112807Abstract: A method of forming a metal wiring of a semiconductor device, and devices thereof. A method of forming a metal wiring, and devices thereof, may maximize semiconductor yield by substantially removing oxide on and/or over a trench and/or by substantially removing a by-product that may remain on and/or over a surface of a wafer. A method of forming a metal wiring of a semiconductor may include forming a dielectric layer on and/or over a metal wiring. A method of forming a metal wiring of a semiconductor may include forming a contact hole, which may expose a partial surface of metal wiring, on and/or over a dielectric layer. A method of forming a metal wiring of a semiconductor may include performing an oxide removing process on and/or over an inner side of a contact hole, and/or performing a by-product removing process on and/or over an inner side wall of a trench.Type: ApplicationFiled: October 29, 2009Publication date: May 6, 2010Inventor: Sang-Chul Kim
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Patent number: 7682965Abstract: Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.Type: GrantFiled: November 27, 2006Date of Patent: March 23, 2010Assignee: Dongbu Electronics Co., Ltd.Inventors: Sang Chul Kim, Han Choon Lee
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Patent number: 7659603Abstract: A semiconductor device includes a substrate formed with a predetermined trench, a plurality of devices fixed into the trench, an etch stop layer on an entire surface of the substrate including the devices while selectively exposing the devices, an interlayer dielectric layer on the etch stop layer, in which the interlayer dielectric layer includes a predetermined via hole and a predetermined trench, and a via plug and a metal line formed on the interlayer dielectric layer while filling the via hole and the trench.Type: GrantFiled: August 29, 2007Date of Patent: February 9, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Sang-Chul Kim
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Publication number: 20090160012Abstract: Embodiments relate to a semiconductor device and a method for fabricating the same. According to embodiments, a semiconductor device may include a first device, a silicon epitaxial layer formed on and/or over the first device, a second device formed on and/or over the silicon epitaxial layer, and a connection via formed through the silicon epitaxial layer, which may electrically interconnect the first device and the second device. According to embodiments, a method for fabricating a semiconductor device may include forming a first device, forming a silicon epitaxial layer on and/or over the first device, forming a connection via through the silicon epitaxial layer, and forming a second device on and/or over the silicon epitaxial layer such that the second device may be electrically connected to the connection via.Type: ApplicationFiled: December 14, 2008Publication date: June 25, 2009Inventor: Sang-Chul Kim
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Patent number: 7541279Abstract: A method for manufacturing a semiconductor device is provided. The method includes the steps of forming an interlayer insulating layer on a semiconductor substrate, selectively patterning the interlayer insulating layer to form a contact hole, depositing a first metal on an inner surface of the contact hole, submerging the semiconductor substrate on which the first metal is deposited into an electrochemical plating (ECP) solution bath in which a second metal is dissolved, dissolving the first metal in the ECP solution bath, plating the first and second metals dissolved in the ECP solution bath at the same time to gap-fill an alloy of the first and second metals in the contact hole, and removing the alloy using the interlayer insulating layer as an end point in a CMP process to form an alloy interconnection.Type: GrantFiled: December 22, 2006Date of Patent: June 2, 2009Assignee: Dongbu Electronics Co., LtdInventors: Sang Chul Kim, Jae Won Han
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Publication number: 20090134439Abstract: A CMOS Image Sensor (CIS) that minimizes light loss and achieves maximized performance. The CIS includes a plurality of metal wirings provided on and/or over a semiconductor substrate and surrounded, respectively, by a dielectric layer, a silicon layer deposited on and/or over the plurality of metal wirings, a photodiode and a plurality of transistors provided at the silicon layer, a color filter formed on and/or over the transistors, and via-contacts penetrated through the silicon layer, the photodiode being connected to the plurality of metal wirings by the via-contacts and gap-fillers. The photodiodes and the transistors are formed after forming the metal line.Type: ApplicationFiled: November 25, 2008Publication date: May 28, 2009Inventor: Sang-Chul Kim
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Publication number: 20090136724Abstract: Embodiments relate to a semiconductor device and to a method of fabricating a semiconductor device. According to embodiments, reliability may be enhanced by removing oxide from a barrier metal surface. According to embodiments, a method may include forming an insulating layer on and/or over a metal layer formed on and/or over a substrate, forming a via hole by etching the insulating layer to expose the metal layer, forming a trench by etching a portion of the insulating layer in an area having the via hole formed therein, forming a barrier metal layer on and/or over the insulating layer including the trench and the via hole, performing plasma processing on the barrier metal layer, and forming a seed Cu layer on the barrier metal layer.Type: ApplicationFiled: October 17, 2008Publication date: May 28, 2009Inventor: Sang-Chul Kim
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Publication number: 20090065684Abstract: An image sensor and a method for fabricating the same having enhanced sensivity. The image sensor enhances sensitivity and minimizes optical loss by isolating color filters from each other using a metal that has superior light reflection properties while having no effect on the color filters during deposition of the metal.Type: ApplicationFiled: September 3, 2008Publication date: March 12, 2009Inventor: Sang-Chul Kim
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Publication number: 20090020881Abstract: A semiconductor device package and fabricating method thereof are disclosed, by which heat-dissipation efficiency is enhanced in a system by interconnection (SBI) structure. An exemplary semiconductor device package may include a substrate, at least two chips mounted on the substrate to have a space between one or more of the chips and an edge of the substrate, an insulating layer covering the chips, the insulating layer having via holes exposing portions of the at least two chips and a trench between the via holes, the insulating layer having at least two hole patterns within the space, and a metal layer filling the via holes and the trench.Type: ApplicationFiled: July 18, 2008Publication date: January 22, 2009Applicant: DONGBU HITEK CO., LTD.Inventor: Sang Chul KIM