Abstract: According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, a nitrogen-based gas and a phosphorous-based gas. The mixture ratio of the nitrogen-based gas to the silicon-based gas among the source gas may be 0.03 or lower (but, excluding zero). Nitrogen in the thin film may be 11.3 atomic percent or lower (but, excluding zero).

Abstract: According to one embodiment of the present invention, a plasma treatment apparatus comprises: a chamber having an inner space in which processes for an object to be treated are performed; and an antenna which is arranged to cover the side part of the chamber, and which forms electric fields in said inner space to generate plasma from the source gas supplied in the inner space. The antenna includes a helical antenna which is formed into a helical shape from one side of the chamber toward the other side of the chamber along a first rotation direction, and which has a current flowing in the first rotation direction; an extension antenna which is connected to one end of the helical antenna positioned at said one side of the chamber, and which has a current flowing in the direction opposite to the first rotation direction; and a connection antenna for interconnecting the extension antenna and the helical antenna.

Abstract: According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, an oxygen-based gas and a phosphorous-based gas. The mixture ratio of the oxygen-based gas to the silicon-based gas may be 0.15 or lower (but, excluding zero). Oxygen in the thin film may be 0.8 atomic percent or lower (but, excluding zero).

Abstract: Disclosed is a method for depositing a polysilicon thin film with ultra-fine crystal grains. According to the present invention, the polysilicon thin film is deposited on a substrate by supplying source gases inside a chamber in which the substrate is loaded, wherein the source gases include a silicon-based gas and an oxygen-based gas. The mixing ratio of the oxygen-based gas to the silicon-based gas may be 0.15 or less (excluding 0). The oxygen within the thin film may be 20 atomic % (atomic percentage) or less (excluding 0).

Abstract: A plasma processing apparatus includes a chamber providing an interior space where a process is performed upon a target; and a plasma generating unit generating an electric field in the interior space to generate plasma from a source gas supplied to the interior space. The plasma generating unit includes an upper source disposed substantially parallel to an upper surface of the chamber, an upper generator connected to the upper source to supply a first current to the upper source, a lateral source surrounding a lateral side of the chamber, and a lateral generator connected to the lateral source to supply a second current to the lateral source. The plasma generating unit further includes an upper matcher disposed between the upper generator and the upper source, and a lower matcher disposed between the lateral generator and the lateral source.

Abstract: A plasma processing apparatus includes a chamber to provide an inner area in which a process is performed upon an object, and a plasma source to generate an electric field in the inner area and thereby to generate plasma from a source gas supplied in the inner area, wherein the plasma source comprises a top source provided in the top of the chamber, and a side source encompassing the side of the chamber and allowing current to flow from the one side of the chamber to the other side thereof.

Abstract: A data receiving apparatus and method includes a current-voltage conversion block, which receives a current-type transmit signal including data and a clock signal inserted into the data at a different level from the data, and then converts the received signal into at least one first voltage and at least one second voltage having a different level from the first voltage, and a comparison block, which makes a comparison between the first and second voltages, and then outputs the received signal as one of the data and the clock signal based on a result of the comparison. The data receiving apparatus can easily recover a clock signal while exhibiting better characteristics during the recovery of the clock signal because it is insensitive to a variation in reference voltage and a variation in current at the transmitting state of the timing controller, which are caused by a process variation.

Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.

Abstract: Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.

Abstract: Disclosed is a method for fabricating a semiconductor device by using a PECYCLE-CVD process. The method includes the steps of feeding source gas into a process chamber for predetermined time within one cycle, allowing reaction gas to flow in the process chamber at least until a plasma reaction is finished in the process chamber and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after source gas is reacted, forming plasma in the process chamber for a predetermined time within one cycle so as to allow reaction gas to react with plasma, thereby depositing a thin film on a wafer, and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after reaction gas is reacted. Superior step-coverage and uniformity of the thin film are achieved while depositing the thin film at a higher speed.

Abstract: A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed.

Abstract: A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.

Abstract: Disclosed is a method for forming a gate of a semiconductor device. The method includes the steps of forming a first oxide layer on a substrate divided into a cell area and a peripheral circuit area, forming a photoresist film pattern on a cell area, thereby exposing a surface of the first oxide layer, removing the exposed first oxide layer formed in the peripheral circuit area, and then, removing the photoresist film, forming a second oxide layer on a surface of the silicon substrate, in which the first oxide layer of the peripheral circuit area is removed, and on a first gate oxide layer of the cell area, forming a poly silicon layer on the second oxide layer, forming a tungsten silicide layer on the poly silicon layer, and sequentially patterning the tungsten silicide layer, the poly silicon layer, the second oxide layer, and the first oxide layer.

Abstract: A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer.

Abstract: Disclosed is a method for fabricating a semiconductor device by using a PECYCLE-CVD process. The method includes the steps of feeding source gas into a process chamber for predetermined time within one cycle, allowing reaction gas to flow in the process chamber at least until a plasma reaction is finished in the process chamber and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after source gas is reacted, forming plasma in the process chamber for a predetermined time within one cycle so as to allow reaction gas to react with plasma, thereby depositing a thin film on a wafer, and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after reaction gas is reacted. Superior step-coverage and uniformity of the thin film are achieved while depositing the thin film at a higher speed.

Abstract: A method for forming a charge storage node is disclosed. The method for forming a charge storage node prevents the bridge between cells and maximize the hole size of a cell forming portion to thus improve the properties of a device and increase product yield by depositing an oxide film having a predetermined thickness and forming a contact hole in order to fill the hole of a notch type generated by the etching difference between a damaged sacrificial oxide film and an oxide film for capacitor formation deposited thereon after enlarging the hole size by washing and dipping processes before the formation of the charge storage node.

Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.

Abstract: A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed.

Abstract: A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer.

Abstract: A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.