Abstract: A method for forming a junction electrode of a semiconductor device where a gate is formed on a semiconductor substrate by using a predetermined device structure, a contact hole is formed by stacking an interlayer insulation film on the gate, and n-type and p-type junction electrodes are formed in the contact hole according to an epitaxial growth method, thereby preventing a defect due to the implantation and improving yields of the semiconductor devices. Moreover, a selective silicon growth method may be employed in a narrow junction portion, thereby reducing the number of processes, prime cost, and time. In addition, performance of the electrode is exemplary and homogeneous, a result which has not been achieved using conventional implantation methods.

Abstract: A method for forming a charge storage node is disclosed. The method for forming a charge storage node prevents the bridge between cells and maximize the hole size of a cell forming portion to thus improve the properties of a device and increase product yield by depositing an oxide film having a predetermined thickness and forming a contact hole in order to fill the hole of a notch type generated by the etching difference between a damaged sacrificial oxide film and an oxide film for capacitor formation deposited thereon after enlarging the hole size by washing and dipping processes before the formation of the charge storage node.

Abstract: Disclosed is a method for forming a capacitor of a semiconductor device. When the lower electrodes of the capacitor are formed, the growth of hemispherical grains is suppressed at the uppermost part and the outer part of the lower electrodes, so as to prevent the generation of a bridge between the lower electrodes of the capacitor thereby increasing product yield, capacitance and reliability.

Abstract: A method for forming a junction electrode of a semiconductor device where a gate is formed on a semiconductor substrate by using a predetermined device structure, a contact hole is formed by stacking an interlayer insulation film on the gate, and n-type and p-type junction electrodes are formed in the contact hole according to an epitaxial growth method, thereby preventing a defect due to the implantation and improving yields of the semiconductor devices. Moreover, a selective silicon growth method may be employed in a narrow junction portion, thereby reducing the number of processes, prime cost, and time. In addition, performance of the electrode is exemplary and homogeneous, a result which has not been achieved using conventional implantation methods.

Abstract: The present invention relates to semiconductor manufacturing field, more particularly, to a process of forming a charge storage electrode to which a selective hemispherical grains (HSG) silicon film is applied. The object of the present invention is to provide a method of forming a charge storage electrode having the selective HSG silicon film in semiconductor device which can secure a sufficient capacitor effective surface area by obtaining desired grain size at the time of selective HSG silicon film formation. The present invention prevents remaining of carbon component which obstructs the growth of HSG silicon film after dry etching process by limiting the carbon halide gas used in dry etching process of amorphous silicon film for defining the charge storage electrode at the time of process of forming the charge storage electrode having selective HSG silicon film.

Abstract: The present invention is a method which can obtain an actual value close to a desired capacitance of capacitor by precisely monitoring the area variation rate of film by using a correlation between a height of hemispherical grains formed on a surface of film and a surface area of film. The present invention provides a method of calculating an area variation rate `C.sub.E ` by using the porosity ratio `f.sub.v ` and the height `t` of hemispherical grains and measuring the capacitance of capacitor by using the obtained area variation rate. According to this method, the area variation rate of film can be obtained close to actual value by measuring the height of hemispherical grains formed on the surface of film, and the variation in capacitance before completion of capacitor can be precisely obtained.

Abstract: This invention discloses a method of forming an electrode of semiconductor device. In the present invention, an amorphous silicon film is formed on a substrate, and silicon seeds are formed on the silicon film. Thereinafter, the heat treatment is performed for growing, thereby forming an hemispherical roughness structure on surface of said charge storage electrode and increasing a surface area in unit area.

Abstract: A method for fabricating a storage electrode of a semiconductor device, capable of forming the storage electrode to have a rough surface with hemispherical lugs by use of simplified deposition process and heat treatment using a single process tube to obtain a high capacitance in spite of a small cell area, thereby greatly improving the operation characteristic of the semiconductor device.

Abstract: A method for manufacturing a conductor layer in a semiconductor device is achieved with a reduced resistivity in the conductor layer. When a polycide film comprised of a polysilicon film and a tungsten silicide film is manufactured, the grain size of the polysilicon film is increased to reduce the resistivity of the polysilicon film. Also, the silicon in the tungsten silicide film is transferred to the boundary between the tungsten silicide film and the polysilicon film to increase the adhesion properties therebetween. Accordingly, a lifting or separation phenomenon is eliminated. Furthermore, since the silicon in the tungsten silicide film is decreased by the transfer, the resistance of the conductor layer is reduced.