Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.

Abstract: A positive electrode active material for a lithium secondary battery has a mixture of microparticles having a predetermined average particle size (D50) and macroparticles having a larger average particle size (D50) than the microparticles. The microparticles have the average particle size (D50) of 1 to 10 ?m and are at least one selected from the group consisting of particles having a carbon material coating layer on all or part of a surface of primary macroparticles having an average particle size (D50) of 1 ?m or more, particles having a carbon material coating layer on all or part of a surface of secondary particles formed by agglomeration of the primary macroparticles, and a mixture thereof. The macroparticles are secondary particles having an average particle size (D50) of 5 to 20 ?m formed by agglomeration of primary microparticles having a smaller average particle size (D50) than the primary macroparticles.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: An image sensor includes a first substrate. A first wiring structure is disposed on the first substrate and includes a first wiring layer. A second substrate is disposed on the first wiring structure and includes a first region and a second region that are spaced apart from each other. The first region includes a photoelectric conversion element disposed therein. A conductive pattern penetrates the second region of the second substrate and extends into the first wiring layer. The conductive pattern includes a step in the first wiring layer. A lowermost surface of the conductive pattern is disposed inside the first wiring layer.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: A semiconductor device may include a first conductive pattern disposed in a first interlayer insulating film, a second conductive pattern disposed in a second interlayer insulating film positioned on the first interlayer insulating film, a through electrode partially penetrating through the first interlayer insulating film and the second interlayer insulating film. The through electrode electrically connects the first conductive pattern and the second conductive pattern. The device further includes a first pattern completely surrounding side surfaces of the through electrode, and a second pattern between the first pattern and the through electrode. The second pattern is separated from the first pattern and the through electrode. The device includes a third pattern connecting the first pattern and the second pattern.

Abstract: A device includes a substrate and a plurality of unit pixels disposed in and/or on the substrate, arranged in a honeycomb pattern and separated from one another by a deep trench isolation (DTI) layer. The plurality of unit pixels may include a group of unit pixels radially arranged around and equidistant from a central unit pixel.

Abstract: An adapter assembly detachably coupled to a plug through a locking structure includes an adapter configured to include connection pins, a plug configured to include a terminal contacting the connection pins and a locking structure through which the plug and the adapter are detachably fixed to each other.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: A device includes a substrate and a plurality of unit pixels disposed in and/or on the substrate, arranged in a honeycomb pattern and separated from one another by a deep trench isolation (DTI) layer. The plurality of unit pixels may include a group of unit pixels radially arranged around and equidistant from a central unit pixel.

Abstract: Methods of manufacturing a complementary metal oxide semiconductor (CMOS) image sensor, include forming, in a semiconductor substrate, at least one device isolation layer defining an active area; forming at least one gate dielectric layer on the active area; forming at least one gate on the active area and the at least one device isolation layer, wherein first conductive-type impurity ions are injected into the at least one gate; and injecting second conductive-type impurity ions into portions of the at least one gate arranged on the at least one device isolation layer and edges of the active area adjacent to the at least one device isolation layer.

Abstract: A unit pixel of an image sensor includes a photoelectric conversion region, a floating diffusion region, and a transfer gate. The photoelectric conversion region is in an active region defined by an isolation region of a semiconductor substrate. The photoelectric conversion region generates electric charges corresponding to incident light. The transfer gate transfers the electric charges to the floating diffusion region, which is located in the active region. The transfer gate includes first and second portions divided relative to a reference line, and at least one of the first or second portions does not overlap the isolation region.

Abstract: A unit pixel of an image sensor includes a photoelectric conversion region, a floating diffusion region, and a transfer gate. The photoelectric conversion region is in an active region defined by an isolation region of a semiconductor substrate. The photoelectric conversion region generates electric charges corresponding to incident light. The transfer gate transfers the electric charges to the floating diffusion region, which is located in the active region.

Abstract: An example embodiment relates to a light-guiding structure. The light-guiding structure may include a bottom surface and a sidewall defined by a first, a second, and a third insulating layer disposed on a semiconductor substrate. The bottom surface may be parallel to a main surface of the semiconductor substrate and may be disposed in the first insulating layer. The sidewall may penetrate the second and third insulating layers to extend to the first insulating layer, and the sidewall may be tapered with respect to the main surface of semiconductor substrate. The light-guiding structure may be included in a image sensor. The image sensor may be included in a processor-based system.

Abstract: An anti-reflective image sensor and method of fabrication are provided, the sensor including a substrate; first color sensing pixels disposed in the substrate; second color sensing pixels disposed in the substrate; third color sensing pixels disposed in the substrate; a first layer disposed directly on the first, second and third color sensing pixels; a second layer disposed directly on the first layer overlying the first, second and third color sensing pixels; and a third layer disposed directly on portions of the second layer overlying at least one of the first or second color sensing pixels, wherein the first layer has a first refractive index, the second layer has a second refractive index greater than the first refractive index, and the third layer has a third refractive index greater than the second refractive index.

Abstract: An anti-reflective image sensor and method of fabrication are provided, the sensor including a substrate; first color sensing pixels disposed in the substrate; second color sensing pixels disposed in the substrate; third color sensing pixels disposed in the substrate; a first layer disposed directly on the first, second and third color sensing pixels; a second layer disposed directly on the first layer overlying the first, second and third color sensing pixels; and a third layer disposed directly on portions of the second layer overlying at least one of the first or second color sensing pixels, wherein the first layer has a first refractive index, the second layer has a second refractive index greater than the first refractive index, and the third layer has a third refractive index greater than the second refractive index.

Abstract: A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal interconnection including forming a interlayer dielectric layer on a substrate, forming an interconnection formation region in the interlayer dielectric layer, performing an ultraviolet (UV) treatment on the substrate after the interconnection formation region is formed and forming a metal interconnection in the interconnection formation region.

Abstract: An image sensor includes an active pixel and a black pixel. The active pixel has a first signal gain and a first dark signal level, and the black pixel has a second signal gain and a second dark signal level. At least one of the first and second signal gains is adjusted such that the first and second dark signal levels are substantially equal for minimizing image defects in the image sensor.

Abstract: An example embodiment relates to a light-guiding structure. The light-guiding structure may include a bottom surface and a sidewall defined by a first, a second, and a third insulating layer disposed on a semiconductor substrate. The bottom surface may be parallel to a main surface of the semiconductor substrate and may be disposed in the first insulating layer. The sidewall may penetrate the second and third insulating layers to extend to the first insulating layer, and the sidewall may be tapered with respect to the main surface of semiconductor substrate. The light-guiding structure may be included in a image sensor. The image sensor may be included in a processor-based system.