Patents by Inventor Sang Jong Lee

Sang Jong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10971821
    Abstract: A chip antenna module includes: a chip antenna including a body portion, a radiating portion, and a grounding portion, wherein the body portion is formed of a dielectric substance, and wherein the radiating portion and the grounding portion are disposed on different surfaces of the body portion from each other; and a substrate having a plurality of layers and including feeding pads bonded to the radiating portion, grounding pads bonded to the grounding portion, and dummy wiring layers disposed on at least one layer among the plurality of layers, below the feeding pads, wherein a resonance frequency of the chip antenna is determined by a number of the dummy wiring layers.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 6, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seong Hee Choi, Sang Jong Lee
  • Patent number: 10930427
    Abstract: A coil component includes: a body; a coil part including a coil pattern embedded in the body and having at least one turn winding around on one direction; first and second external electrodes disposed on a surface of the body and connected to the coil part; and a shielding via having a permeability higher than that of the body and extending along the one direction in the body.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: February 23, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hee Soo Yoon, Jae Woon Park, Seung Jae Song, Sang Jong Lee, Min Ki Jung, Seung Hee Hong, Su Bong Jang
  • Patent number: 10923433
    Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: February 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mi Ja Han, Dae Hyun Park, Seong Hwan Lee, Sang Jong Lee
  • Patent number: 10923259
    Abstract: A coil component includes a body, a coil disposed inside of the body and forming one coil track when being viewed in a laminated direction, external electrodes disposed on an outer surface of the body. The coil track includes corner portions and linear portions connecting the respective corner portions to each other, and a line width of the corner portion is greater than that of the linear portion.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: February 16, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Ki Jung, Su Bong Jang, Sang Jong Lee
  • Patent number: 10886192
    Abstract: A semiconductor package includes a first semiconductor package including a core member having a through-hole, a first semiconductor chip disposed in the through-hole and having an active surface with a connection pad disposed thereon, a first encapsulant for encapsulating at least a portion of the first semiconductor chip, and a connection member disposed on the active surface of the first semiconductor chip and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, a second semiconductor package disposed on the first semiconductor package and including a wiring substrate electrically connected to the connection member, at least one second semiconductor chip disposed on the wiring substrate, and a second encapsulant for encapsulating at least a portion of the second semiconductor chip, and a heat dissipation member covering a lateral surface of the second semiconductor package and exposing an upper surface of the second encapsulant.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: January 5, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hyun Lim, Han Kim, Yoon Seok Seo, Sang Jong Lee
  • Patent number: 10842021
    Abstract: A printed circuit board includes a magnetic member including a magnetic layer, a first coil pattern disposed above the magnetic member, and having a planar spiral structure, and a second coil pattern disposed below the magnetic member, and having a planar spiral structure.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: November 17, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO. LTD.
    Inventors: Seung Jae Song, Seong Hee Choi, Sang Jong Lee, Mi Ja Han
  • Patent number: 10804215
    Abstract: A semiconductor package comprising: a frame having an opening and including wiring layers and one or more layer of connection vias; a semiconductor chip disposed in the opening and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering the frame and the semiconductor chip and filling the opening; a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pads and the wiring layers; one or more passive components disposed on the connection structure; a molding material covering each of the passive components; and a metal layer covering outer surfaces of each of the frame, the connection structure, and the molding material. The metal layer is connected to a ground pattern included in the wiring layers of the frame.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: October 13, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Sang Jong Lee, Chul Kyu Kim, Yoon Seok Seo
  • Patent number: 10726999
    Abstract: A composite electronic component includes a body including a capacitor unit and an inductor unit and having a plurality of insulating layers stacked in a first direction perpendicular to a mounting surface of the body. A plurality of external electrodes are on external surfaces of the body. The capacitor unit includes first and second internal electrodes alternately stacked with insulating layers interposed therebetween. The inductor unit includes a coil including coil patterns having a spiral shape, on respective insulating layers, and connected together.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: July 28, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Jong Lee, Han Kim, Seung Hee Hong, Min Ki Jung, Su Bong Jang
  • Publication number: 20200219783
    Abstract: A semiconductor package includes a first semiconductor package including a core member having a through-hole, a first semiconductor chip disposed in the through-hole and having an active surface with a connection pad disposed thereon, a first encapsulant for encapsulating at least a portion of the first semiconductor chip, and a connection member disposed on the active surface of the first semiconductor chip and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, a second semiconductor package disposed on the first semiconductor package and including a wiring substrate electrically connected to the connection member, at least one second semiconductor chip disposed on the wiring substrate, and a second encapsulant for encapsulating at least a portion of the second semiconductor chip, and a heat dissipation member covering a lateral surface of the second semiconductor package and exposing an upper surface of the second encapsulant.
    Type: Application
    Filed: March 17, 2020
    Publication date: July 9, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han KIM, Jae Hyun LIM, Yoon Seok SEO, Sang Jong LEE
  • Patent number: 10690998
    Abstract: A camera module includes a housing including a lens module; a diaphragm module to form N apertures of different sizes, where N is a natural number, with blades disposed on an object side of the lens module; and a diaphragm driving unit disposed with the diaphragm module, and including a driving coil and a magnetic member disposed opposite to the driving coil, the magnetic member being movable in a direction perpendicular to an optical axis to be fixed in N positions along a movement path.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: June 23, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Hee Hong, Sang Jong Lee, Min Ki Jung, Hee Soo Yoon, Su Bong Jang, Seung Jae Song
  • Patent number: 10685926
    Abstract: An antenna module includes an antenna substrate including a core layer, insulating layers disposed on opposite surfaces of the core layer, and wiring layers including antenna patterns. The antenna substrate has first and second recess portions. The antenna module further includes a passive component disposed in the first recess portion, a semiconductor chip disposed in the second recess portion and having an active surface, an encapsulant encapsulating at least portions of the semiconductor chip and the passive component, and a connection portion disposed on the active surface of the semiconductor chip and including redistribution layers electrically connected to the semiconductor chip. The passive component has a thickness greater than that of the semiconductor chip, and the first recess portion has a depth greater than that of the second recess portion.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: June 16, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyun Lim, Han Kim, Chul Kyu Kim, Sang Jong Lee, Jung Ho Shim
  • Publication number: 20200176391
    Abstract: A semiconductor package comprising: a frame having an opening and including wiring layers and one or more layer of connection vias; a semiconductor chip disposed in the opening and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering the frame and the semiconductor chip and filling the opening; a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pads and the wiring layers; one or more passive components disposed on the connection structure; a molding material covering each of the passive components; and a metal layer covering outer surfaces of each of the frame, the connection structure, and the molding material. The metal layer is connected to a ground pattern included in the wiring layers of the frame.
    Type: Application
    Filed: May 21, 2019
    Publication date: June 4, 2020
    Inventors: Jae Hyun Lim, Sang Jong Lee, Chul Kyu Kim, Yoon Seok Seo
  • Publication number: 20200168591
    Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.
    Type: Application
    Filed: June 27, 2019
    Publication date: May 28, 2020
    Inventors: Chul Kyu KIM, Dae Hyun PARK, Jung Ho SHIM, Jae Hyun LIM, Mi Ja HAN, Sang Jong LEE, Han KIM
  • Publication number: 20200168558
    Abstract: A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.
    Type: Application
    Filed: June 6, 2019
    Publication date: May 28, 2020
    Inventors: Yoon Seok SEO, Dae Hyun PARK, Sang Jong LEE, Chul Kyu KIM, Jae Hyun LIM
  • Patent number: 10643956
    Abstract: A semiconductor package includes: a frame having first and second through-holes spaced apart from each other; passive components disposed in the first through-hole; a semiconductor chip disposed in the second through-hole and having an active surface on which connection pads are disposed and an inactive surface opposing the active surface; a first encapsulant covering at least portions of the passive components and filling at least portions of the first through-hole; a second encapsulant covering at least portions of the semiconductor chip and filling at least portions of the second through-hole; and a connection structure disposed on the frame, the passive components, and the active surface of the semiconductor chip and including wiring layers electrically connected to the passive components and the connection pads of the semiconductor chip. The second encapsulant has a higher electromagnetic wave absorption rate than that of the first encapsulant.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: May 5, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung Joon Kim, Sang Jong Lee, Yoon Seok Seo
  • Publication number: 20200136255
    Abstract: A chip antenna module includes: a chip antenna including a body portion, a radiating portion, and a grounding portion, wherein the body portion is formed of a dielectric substance, and wherein the radiating portion and the grounding portion are disposed on different surfaces of the body portion from each other; and a substrate having a plurality of layers and including feeding pads bonded to the radiating portion, grounding pads bonded to the grounding portion, and dummy wiring layers disposed on at least one layer among the plurality of layers, below the feeding pads, wherein a resonance frequency of the chip antenna is determined by a number of the dummy wiring layers.
    Type: Application
    Filed: June 27, 2019
    Publication date: April 30, 2020
    Applicant: Samsung Electro-Mechanics., Ltd.
    Inventors: Seong Hee CHOI, Sang Jong LEE
  • Patent number: 10629373
    Abstract: A thin film capacitor includes a body including a dielectric layer, a first internal electrode layer and a second internal electrode layer, a melting point of a material included in the first internal electrode layer being lower than a melting point of a material included in the second internal electrode layer, and a first external electrode and a second external electrode disposed on an upper surface of the body, the second internal electrode layer being disposed on an upper surface of the first internal electrode layer and a lower surface of the first internal electrode layer opposing the upper surface of the first internal electrode layer.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: April 21, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hee Soo Yoon, Su Bong Jang, Sang Jong Lee, Seung Hee Hong
  • Patent number: 10607914
    Abstract: A semiconductor package includes a first semiconductor package including a core member having a through-hole, a first semiconductor chip disposed in the through-hole and having an active surface with a connection pad disposed thereon, a first encapsulant for encapsulating at least a portion of the first semiconductor chip, and a connection member disposed on the active surface of the first semiconductor chip and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, a second semiconductor package disposed on the first semiconductor package and including a wiring substrate electrically connected to the connection member, at least one second semiconductor chip disposed on the wiring substrate, and a second encapsulant for encapsulating at least a portion of the second semiconductor chip, and a heat dissipation member covering a lateral surface of the second semiconductor package and exposing an upper surface of the second encapsulant.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: March 31, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hyun Lim, Han Kim, Yoon Seok Seo, Sang Jong Lee
  • Publication number: 20200091583
    Abstract: A chip antenna module includes: a substrate including a feed wiring layer to provide a feed signal, a feeding via connected to the feed wiring layer, and a dummy via separated from the feed wiring layer; and a chip antenna disposed on a first surface of the substrate and including a body portion formed of a dielectric substance, a radiating portion that extends from a first surface of the body portion and is connected to the feeding via and the dummy via, and a grounding portion that extends from a second surface of the body portion opposite the first surface of the body portion.
    Type: Application
    Filed: July 9, 2019
    Publication date: March 19, 2020
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seong Hee CHOI, Sang Jong LEE
  • Publication number: 20200083593
    Abstract: An antenna module includes: a board having a first surface including a ground region and a feed region; and chip antennas mounted on the first surface, each of the chip antennas including a first antenna and a second antenna. The first antenna and the second antenna each include a ground portion bonded to the ground region, and a radiation portion bonded to the feed region. A length of a radiating surface of the first antenna is greater than a mounting height of the first antenna, and a mounting height of the second antenna is greater than a length of a radiating surface of the second antenna. A horizontal spacing distance between the radiation portion of the first antenna and the ground region is greater than a horizontal spacing distance between the radiation portion of the second antenna and the ground region.
    Type: Application
    Filed: June 28, 2019
    Publication date: March 12, 2020
    Applicant: Samsung Electro-Mechanics.,Co., Ltd.
    Inventors: Seong Hee CHOI, Sang Jong LEE, Sung Yong AN, Jae Yeong KIM, Ju Hyoung PARK