Abstract: A method for testing an overlay occurring in a semiconductor device to compensate for an error generated in the measurement of overlay. This method involves forming an inner mark on a semiconductor wafer, and forming an outer mark on the semiconductor wafer in such a fashion that the outer mark is inclined in one direction and has an island portion arranged in the inside of the inner mark and a land portion comprised of a photoresist film pattern formed over the entire surface of the semiconductor wafer while being spaced from the island portion by a desired distance, thereby forming an overlay measuring mark consisting of the inner and outer marks. Measured values of the island and land portions of the inner mark are averaged and then compared with measured values of the outer mark, thereby deriving overlay compensation values. Accordingly, even if the overlay measuring mark is formed in an inclined state, the method can simply measure an inaccuracy in measured overlay value.

Abstract: There are disclosed processes for forming fine patterns on a semiconductor substrate to a lesser degree than the resolving power of a step and repeat used, thereby improving the degree of integration of the semiconductor device. The process comprises the steps of: forming a first light-exposure mask and a second light-exposure mask with interlaced patterns selected from a plurality of fine patterns to be formed on a semiconductor substrate; coating an organic material layer on the semiconductor substrate; patterning the organic material layer by use of the first light-exposure mask, to form organic material layer patterns; forming a photosensitive film over the organic material layer patterns; and patterning the photosensitive film by use of the second light-exposure mask to form photosensitive film patterns, in such a way that each of photosensitive film patterns is interposed between two adjacent organic material layer patterns.

Abstract: A method for fabricating a light exposure mask, including forming a pattern on a wafer by use of a primary light exposure mask formed with a light shield film pattern in accordance with a design rule, transmitting, to a data comparison system, data obtained after measuring the size of the pattern on the wafer by use of a process defect inspection system, comparing the data with the size of the light shield film pattern, thereby detecting a portion of the pattern on the wafer which has a difference from a critical size value of the light shield film pattern, determining, by use of a compensation equation, an amendment value for a portion of the light shield film pattern which corresponds to the detected portion of the pattern on the wafer, and forming a secondary light exposure mask, based on the amendment value.

Abstract: There are disclosed processes for forming fine patterns on a semiconductor substrate to a lesser degree than the resolving power of a step and repeat used, thereby improving the degree of integration of the semiconductor device. The process comprises the steps of: forming a first light-exposure mask and a second light-exposure mask with interlaced patterns selected from a plurality of fine patterns to be formed on a semiconductor substrate; coating an organic material layer on the semiconductor substrate; patterning the organic material layer by use of the first light-exposure mask, to form organic material layer patterns; forming a photosensitive film over the organic material layer patterns; and patterning the photosensitive film by use of the second light-exposure mask to form photosensitive film patterns, in such a way that each of photosensitive film patterns is interposed between two adjacent organic material layer patterns.

Abstract: A phase shift mask having a uniform thickness at a phase shift region. The phase shift mask includes a quartz substrate provided with a plurality of grooves, a chromium pattern coated over the grooves and every other portion of the quartz substrate disposed between the grooves, and a phase shift material pattern coated over the portion of the quart substrate not covered with the chromium pattern, the phase shift material pattern overlapping with the portions of the chromium pattern disposed at opposite sides of the portion of the quartz substrate not covered with the chromium pattern. This phase shift mask is fabricated by forming the chromium pattern such that it is flush with the quartz substrate at its edge. By this phase shift mask, it is possible to prevent the phase shift material pattern overlapping with the chromium pattern from having a non-uniform thickness due to the topology of the chromium pattern.

Abstract: There are disclosed processes for forming fine patterns on a semiconductor substrate to a lesser degree than the resolving power of a step and repeat used, thereby improving the degree of integration of the semiconductor device. The process comprises the steps of: forming a first light-exposure mask and a second light-exposure mask with interlaced patterns selected from a plurality of fine patterns to be formed on a semiconductor substrate; coating an organic material layer on the semiconductor substrate; patterning the organic material layer by use of the first light-exposure mask, to form organic material layer patterns; forming a photosensitive film over the organic material layer patterns; and patterning the photosensitive film by use of the second light-exposure mask to form photosensitive film patterns, in such a way that each of photosensitive film patterns is interposed between two adjacent organic material layer patterns.

Abstract: A reticle for off-axis illumination which has spaces with different sizes wherein subsidiary patterns are formed at space patterns which are larger in size than the space of maximal focus latitude margin and thus, inappropriate for off-axis illumination, in such a way that the diffraction angle may be equivalent or similar in the total patterns of the reticle. Repetitively arranged, the subsidiary patterns are of dot shape or protuberance shape which have sizes insufficient to form image on the wafer. As a result, the marginal space is, in size, equivalent or similar to the pattern of the maximal focus latitude margin, thereby making small process margin available in large space patterns as large as the process margin available in small space patterns. Therefore, the progress allowance for semiconductor fabrication is enlarged uniformly, and a significant improvement is achieved in the reliability and process yield as well as in uniformity of the patterns.

Abstract: A light exposure method for fabrication of a semiconductor device and a dummy mask used therefor, capable of forming an ultra-fine pattern by diffracting incident light while controlling or cutting off light components vertically incident on a mask formed with a pattern, thereby increasing the depth of focus and improving the resolution. The dummy mask includes a transparent substrate provided at its upper surface with a diffracting pattern for primarily diffracting light from a light source incident on the dummy mask and at its lower surface with a blocking pattern for removing vertically incident light not diffracted by the diffraction patterns.

Abstract: A pattern alignment mark equipped with at least one designated measuring pattern for an alignment during the process of fabrication of semiconductor devices, a means for attenuating light reflection on the pattern with higher light reflection intensity among said designated measuring patterns, said attenuating means preventing the occurrence of a pattern alignment error due to the differences in the light reflection intensities while measuring the overlay accuracy of patterns, thus enhancing the yield and reliability of fabrication by achieving the stabilization of the process and the reduction of the process time.

Abstract: A method for aligning micro patterns of a semiconductor device, capable of reducing the number of dies having poor quality in the formation of patterns, thereby achieving an improvement in operation reliability of the semiconductor device. The method of the present invention utilizes the fact that even in the case of a semiconductor wafer having alignment marks damaged due to an error occurring in the formation or etching of thin films, outer mark portions of its overlay measuring marks can be observed. For several dies sampled as observation dies from the semiconductor wafer, light exposure is carried out to form photoresist film patterns under the condition that the semiconductor wafer is misaligned from the light exposure mask. Thereafter, alignment marks and inner mark portions of overlay measuring marks are formed. A misalignment angle .theta. between the semiconductor wafer and light exposure mask is also calculated.