Abstract: A semiconductor device includes a line; a source structure on the line; a stack structure on the source structure; a first slit structure penetrating the stack structure; a second slit structure penetrating the stack structure; and a contact plug adjacent to the first slit structure in a first direction. The first slit structure and the second slit structure may be spaced apart from each other by a first distance in a second direction that is perpendicular to the first direction. The contact plug penetrates the source structure, the contact plug being electrically connected to the lower line. The first slit structure and the contact plug may be spaced apart from each other by a second distance in the first direction, and the second distance may be longer than the first distance.

Abstract: A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.

Abstract: Provided is an airflow control system and airflow control method capable of preventing the inflow of foreign, the airflow control system including at least one grating panel mounted on a floor of a clean room and including a plurality of through holes, a semiconductor manufacturing equipment spaced apart from the grating panel by a gap space by using supports or legs, and including a fan mounted toward the grating panel, and a negative pressure preventer for preventing a negative pressure locally formed in the gap space due to a pressure difference between an outer downward airflow flowing along sides of the semiconductor manufacturing equipment and expelled to an outside through the through holes of the grating panel, and an inner downward airflow flowing from the semiconductor manufacturing equipment to the grating panel by the fan and expelled to the outside through the through holes of the grating panel.

Abstract: A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.

Abstract: A semiconductor device includes a line; a source structure on the line; a stack structure on the source structure; a first slit structure penetrating the stack structure; a second slit structure penetrating the stack structure; and a contact plug adjacent to the first slit structure in a first direction. The first slit structure and the second slit structure may be spaced apart from each other by a first distance in a second direction that is perpendicular to the first direction. The contact plug penetrates the source structure, the contact plug being electrically connected to the lower line. The first slit structure and the contact plug may be spaced apart from each other by a second distance in the first direction, and the second distance may be longer than the first distance.

Abstract: A semiconductor device includes a line; a source structure on the line; a stack structure on the source structure; a first slit structure penetrating the stack structure; a second slit structure penetrating the stack structure; and a contact plug adjacent to the first slit structure in a first direction. The first slit structure and the second slit structure may be spaced apart from each other by a first distance in a second direction that is perpendicular to the first direction. The contact plug penetrates the source structure, the contact plug being electrically connected to the lower line. The first slit structure and the contact plug may be spaced apart from each other by a second distance in the first direction, and the second distance may be longer than the first distance.

Abstract: A three-dimensional semiconductor device includes a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate, and vertical channel structures penetrating the stacked structure.

Abstract: The present disclosure relates to methods of detecting a protein from the SARS-CoV-2 virus, or a fragment thereof, in a sample obtained from a subject using a first antibody or antigen-binding fragment thereof that binds to a protein from the SARS-CoV-2 virus, or a fragment thereof, and a second antibody or antigen-binding fragment thereof which binds to a protein from the SARS-CoV-2 virus, or a fragment thereof.

Abstract: A semiconductor device includes a line; a source structure on the line; a stack structure on the source structure; a first slit structure penetrating the stack structure; a second slit structure penetrating the stack structure; and a contact plug adjacent to the first slit structure in a first direction. The first slit structure and the second slit structure may be spaced apart from each other by a first distance in a second direction that is perpendicular to the first direction. The contact plug penetrates the source structure, the contact plug being electrically connected to the lower line. The first slit structure and the contact plug may be spaced apart from each other by a second distance in the first direction, and the second distance may be longer than the first distance.

Abstract: A semiconductor device may include a substrate, a first nanowire, a second nanowire, a first gate insulating layer, a second gate insulating layer, a first metal layer and a second metal layer. The first gate insulating layer may be along a periphery of the first nanowire. The second gate insulating layer may be along a periphery of the second nanowire. The first metal layer may be on a top surface of the first gate insulating layer along the periphery of the first nanowire. The first metal layer may have a first crystal grain size. The second metal layer may be on a top surface of the second gate insulating layer along the periphery of the second nanowire. The second metal layer may have a second crystal grain size different from the first crystal grain size.

Abstract: A receptacle connector having a stable contact point structure and a rigid structure, and a connector assembly including the same, is provided. The receptacle connector includes a receptacle housing, a plurality of receptacle terminals which are retained and supported in the receptacle housing in a first direction, and one pair of receptacle metal members which are provided on both ends of the receptacle housing in the first direction.

Abstract: A display device includes a pixel circuit on a substrate and including a transistor, a first pixel electrode on the pixel circuit and electrically connected to the pixel circuit, a bank on the first pixel electrode and including first, second, third, and fourth open parts, a first contact electrode on the bank and the first and second open parts and in contact with the first pixel electrode through the first open part, a second pixel electrode overlapping the second and third open parts, the second pixel electrode and the first pixel electrode formed as a same layer, a second contact electrode on the bank and the third and fourth open parts and in contact with the second pixel electrode through the third open part, and a common pixel electrode overlapping the fourth open part, the common pixel electrode and the second pixel electrode formed as a same layer.

Abstract: A semiconductor package is provided. The semiconductor package can include a first redistributed layer on which a plurality of semiconductor chips and a plurality of passive devices are mounted on one surface, a second redistributed layer electrically connected to the first redistributed layer through a via, an external connection terminal formed on the lower surface of the second redistributed layer, a first mold provided to cover the plurality of semiconductor chips and the plurality of passive devices on the first redistributed layer, and a second mold provided between the first redistributed layer and the second redistributed layer. Each of the first redistributed layer and the second redistributed layer includes a wiring pattern and an insulating layer and is composed of a plurality of layers, and at least one of the plurality of semiconductor chips is disposed between the first redistributed layer and the second redistributed layer.

Abstract: A display device includes a substrate, a first semiconductor layer, and including first and second transistors, first and second gate conductive layers above the first semiconductor layer, a second semiconductor layer above the second gate conductive layer, and including a third transistor, a third gate conductive layer above the second semiconductor layer, an insulating film defining a valley surrounding the first semiconductor layer, the first gate conductive layer, the second gate conductive layer, the second semiconductor layer, and the third gate conductive layer, a connection metal conductive layer above the insulating film, and including a first connection electrode electrically connecting the first and third transistors, the first connection electrode including a (1-1)-th region overlapping the first transistor, and a (1-2)-th region and a (1-3)-th region overlapping the third transistor and connected to the third transistor, and first and second data conductive layers above the connection metal condu

Abstract: A semiconductor device includes an active pattern including: a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction; a gate structure on the lower pattern and including a gate electrode and a gate insulating film including an interfacial insulating film including a first vertical portion and a horizontal portion. A dimension in a third direction of the first vertical portion is greater than a dimension in the second direction of the horizontal portion. The first vertical portion includes: a first area contacting a source/drain pattern; and a second area provided between the first area and the gate electrode. The interfacial insulating film includes a first element other than silicon, wherein a concentration of the first element in the first area is greater than a concentration of the first element in the second area.

Abstract: Disclosed are a method for inducing a prediction motion vector and an apparatus using the same. An image decoding method can include: a step of determining the information related to a plurality of spatial candidate prediction motion vectors from peripheral predicted blocks of a predicted target block; and a step of determining the information related to temporal candidate prediction motion vectors on the basis of the information related to the plurality of spatial candidate prediction motion vectors. Accordingly, the present invention can reduce complexity and can enhance coding efficiency when inducing the optimum prediction motion vector.

Abstract: The present invention provides a bilirubin nanoparticle formed by the self-assembly of bilirubin and a composite comprising a hydrophilic polymer, a use thereof, and a preparation method therefor. The bilirubin nanoparticle according to the present invention can release a drug enclosed therein to the outside by being collapsed by light or active oxygen stimulation. The bilirubin nanoparticle according to the present invention exhibits antioxidant, antiangiogenic, anticancer, and anti-inflammatory activities.

Abstract: A semiconductor device includes a substrate. A first channel pattern is disposed on the substrate. The first channel pattern includes a first side and a second side opposite to each other in a first direction. A first gate electrode is disposed on the first side of the first channel pattern. A first source/drain electrode is disposed on the first side of the first channel pattern. A second source/drain electrode is disposed on the second side of the first channel pattern. The first gate electrode overlaps the second source/drain electrode in the first direction.

Abstract: A gate driving circuit includes: a pull-up control circuit configured to control a voltage of a pull-up control node in response to a pull-up control signal; a pull-down control circuit configured to control a voltage of a pull-down control node in response to the voltage of the pull-up control node; a carry output circuit configured to output a carry signal in response to the voltage of the pull-up control node and the voltage of the pull-down control node; and a gate output circuit configured to output a plurality of gate signals having different timings in response to the voltage of the pull-up control node and the voltage of the pull-down control node, wherein a width of the carry signal is greater than a width of each of the gate signals.

Abstract: A three-dimensional semiconductor device includes a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate, and vertical channel structures penetrating the stacked structure.