Patents by Inventor Sanjay Kumar

Sanjay Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230067904
    Abstract: Certain embodiments described herein relate to an improved virtual machine restoration system. In one embodiment, an information management system receives a request to perform a restore of a virtual machine using virtual machine data stored on a secondary storage device. In response, the information management system boots up the virtual machine after restoring only a portion of the virtual machine data that is needed to boot up the virtual machine, thereby reducing latencies associated with virtual machine boot-up. The information management system continues to retrieve additional portions of the virtual machine data from the secondary storage device as such portions are requested by the virtual machine, thereby reducing or minimizing unnecessary data transfer from the secondary storage device.
    Type: Application
    Filed: August 4, 2022
    Publication date: March 2, 2023
    Inventor: Sanjay Kumar
  • Patent number: 11594276
    Abstract: A dual-rail memory includes, in part, a memory array that operates using a first supply voltage, and a periphery circuit that operates using a second supply voltage. The periphery circuit includes, in part, a clock generation circuit and a comparator. The dual-rail memory also includes a level shifter that varies the voltage level of a number of signals of the memory between the first and second supply voltages. The clock generation circuit is adapted, among other operations, to generate a read clock signal in response to a read request signal. The level shifter is adapted to supply a reference wordline read signal in response to the read clock signal. The comparator is adapted to select a delay between the read clock signal and the reference wordline read signal in response to a difference between the first and second supply voltages.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 28, 2023
    Assignee: Synopsys, Inc.
    Inventors: Praveen Kumar Verma, Sanjay Kumar Yadav, Rohan Makwana, Vijit Gadi
  • Patent number: 11586238
    Abstract: A clock generator includes an input coupled to receive an input clock signal from a first clock source, and a noise rejection circuit configured to provide an output clock signal based on the input clock signal. The noise rejection circuit includes an event generator having a digital counter circuit. The event generator is configured to generate a first event signal based on a count value of the digital counter circuit, in which the noise rejection circuit is configured to produce an edge on the output clock signal in response to both the event signal and a state of the input clock signal.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: February 21, 2023
    Assignee: NXP B.V.
    Inventors: Robert Matthew Mertens, Ateet Omer, Sanjay Kumar Wadhwa, Charles Eric Seaberg
  • Patent number: 11581878
    Abstract: A level shifter includes a control circuit and a bias circuit. The control circuit receives a bias voltage, a first signal associated with a first voltage domain, and supply voltages associated with a second voltage domain, and outputs a second signal that is associated with the second voltage domain. The bias circuit generates the bias voltage that is indicative of the duty cycle of the second signal, and provides the bias voltage to the control circuit to control the duty cycle of the second signal. The duty cycle of the second signal is controlled such that a difference between a duty cycle of the first signal and an inverse of the duty cycle of the second signal is less than a tolerance limit.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: February 14, 2023
    Assignee: NXP B.V.
    Inventors: Sanjay Kumar Wadhwa, Saurabh Goyal, Divya Tripathi
  • Publication number: 20230042934
    Abstract: Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling mode for each work queue of the plurality of work queues, the page fault handling modes including a first page fault handling mode and a second page fault handling mode.
    Type: Application
    Filed: December 22, 2021
    Publication date: February 9, 2023
    Inventors: Utkarsh Y. KAKAIYA, Philip LANTZ, Sanjay KUMAR, Rajesh SANKARAN, Narayan RANGANATHAN, Saurabh GAYEN, Dhananjay JOSHI, Nikhil P. RAO
  • Publication number: 20230043336
    Abstract: Data protection resources are automatically scaled to the needs of data source(s) in an application orchestrator computing environment, such as a cluster in a Kubernetes deployment. The approach is adaptable to data sources in production clusters or application suites that are not application orchestrator deployments, such as a cloud-based database-as-a-service (DBaaS). A data storage management system protects cluster-based data with an elastic number of data protection resources (e.g., data agents, media agents), which are deployed on demand. The number of data protection resources deployed for a particular job are appropriate to the workload(s) at present and depend on a variety of scaling factors. In some embodiments, data protection resources are deployed within the same cluster as the data sources.
    Type: Application
    Filed: May 16, 2022
    Publication date: February 9, 2023
    Inventors: Amit MITKAR, Sanjay KUMAR, Manas Bhikchand MUTHA, Sumedh Pramod DEGAONKAR
  • Publication number: 20230032236
    Abstract: Methods and apparatus relating to data streaming accelerators are described. In an embodiment, a hardware accelerator such as a Data Streaming Accelerator (DSA) logic circuitry provides high-performance data movement and/or data transformation for data to be transferred between a processor (having one or more processor cores) and a storage device. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 2, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh M. Sankaran, Philip R. Lantz, Narayan Ranganathan, Saurabh Gayen, Sanjay Kumar, Nikhil Rao, Dhananjay A. Joshi, Hai Ming Khor, Utkarsh Y. Kakaiya
  • Publication number: 20230029882
    Abstract: Systems, methods, and computer-readable media are provided for performing secure frame encryption as a service. For instance, a network edge device can determine at least a first path and a second path for routing a data packet. The network edge device can obtain a first plurality of values for at least one network metric, wherein the first plurality of values corresponds to the first path and at least a first backup path associated with the first path. The network edge device can obtain a second plurality of values for the at least one network metric, wherein the second plurality of values corresponds to the second path and at least a second backup path associated with the second path. The network edge device can select one of the first path or the second path for routing the data packet based on a comparison of the first plurality of values and the second plurality of values.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Inventors: Sanjay Kumar Hooda, Anoop Vetteth, Himanshu Mehra, Rajeev Kumar
  • Publication number: 20230032586
    Abstract: Methods and apparatus relating to scalable access control checking for cross-address-space data movement are described. In an embodiment, a memory stores an InterDomain Permissions Table (IDPT) having a plurality of entries. At least one entry of the IDPT provides a relationship between a target address space identifier and a plurality of requester address space identifiers. A hardware accelerator device allows access to a target address space, corresponding to the target address space identifier, by one or more of requesters, corresponding to the plurality of requester address space identifiers, respectively, based at least in part on the relationship provided by the at least one entry of the IDPT. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: April 1, 2022
    Publication date: February 2, 2023
    Applicant: Intel Corporation
    Inventors: Narayan Ranganathan, Philip R. Lantz, Rajesh M. Sankaran, Sanjay Kumar, Saurabh Gayen, Nikhil Rao, Utkarsh Y. Kakaiya, Dhananjay A. Joshi, David Jiang, Ashok Raj
  • Patent number: 11570109
    Abstract: This disclosure describes techniques for software-defined service insertion. The techniques include a method of configuring a network for service insertion. The techniques include processing a master policy correlating an endpoint group pair, of source endpoint group and destination endpoint group, to a service graph. The service graph indicates a template service chain, and the template service chain indicates an ordering of a plurality of services. Processing the master policy includes disaggregating the master policy into at least one location specific policy, each of the at least one location specific policy corresponding to a separate location in the network and including traffic steering directives corresponding to a portion of the plurality of services associated with the separate location. The techniques further include causing each of the at least one location specific policy to be stored in association with the separate location to which that location specific policy corresponds.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: January 31, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Victor Manuel Moreno, Sanjay Kumar Hooda, Anoop Vetteth, Prakash C. Jain
  • Publication number: 20230025833
    Abstract: An add-in card printed circuit board (PCB) includes a body portion and a card edge portion. The body portion includes a circuit trace associated with a high-speed data communication interface. The card edge portion includes contact fingers, and is configured to be inserted into a card edge connector of an information handling system. The contact fingers include a signal contact finger coupled to the circuit trace, and a ground contact finger that is located adjacent to the signal contact finger. The ground contact finger includes a ground via that couples the ground contact finger to a ground plane layer of the add-in card PCB. The ground via is located half way within the body portion and half way within the card edge portion.
    Type: Application
    Filed: October 20, 2021
    Publication date: January 26, 2023
    Inventors: Malikarjun Vasa, Sanjay Kumar, Bhyrav Mutnury
  • Patent number: 11561866
    Abstract: A “backup services container” comprises “backup toolkits,” which include scripts for accessing containerized applications plus enabling utilities/environments for executing the scripts. The backup services container is added to Kubernetes pods comprising containerized applications without changing other pod containers. For maximum value and advantage, the backup services container is “over-equipped” with toolkits. The backup services container selects and applies a suitable backup toolkit to a containerized application to ready it for a pending backup. Interoperability with a proprietary data storage management system provides features that are not possible with third-party backup systems. Some embodiments include one or more components of the proprietary data storage management within the illustrative backup services container. Some embodiments include one or more components of the proprietary data storage management system in a backup services pod configured in a Kubernetes node.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: January 24, 2023
    Assignee: Commvault Systems, Inc.
    Inventors: Amit Mitkar, Sumedh Pramod Degaonkar, Sanjay Kumar, Shankarbabu Bhavanarushi, Vikash Kumar
  • Publication number: 20230017053
    Abstract: Techniques are described herein for service chaining in fabric networks such that hardware resources can be preserved without service nodes needing additional capabilities. The techniques may include storing a first configuration associated with a first VRF instance of a service forwarding node that is connected to a first service of a service chain sequence. The first configuration may indicate an identifier and a type associated with a second service of the service chain sequence where traffic is to be sent after the first service. Additionally, the techniques may also include storing a second configuration associated with a second VRF instance of the service forwarding node that is connected to the second service. The second configuration may indicate that the second service is a last service of the service chain sequence. When traffic is received at the service forwarding node, the service forwarding node can determine whether the traffic is pre-service traffic or post-service traffic.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 19, 2023
    Inventors: Prakash C. Jain, Sanjay Kumar Hooda, Vinay Saini, Victor Manuel Moreno
  • Patent number: 11556363
    Abstract: Techniques for transferring virtual machines and resource management in a virtualized computing environment are described. In one embodiment, for example, an apparatus may include at least one memory, at least one processor, and logic for transferring a virtual machine (VM), at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to generate a plurality of virtualized capability registers for a virtual device (VDEV) by virtualizing a plurality of device-specific capability registers of a physical device to be virtualized by the VM, the plurality of virtualized capability registers comprising a plurality of device-specific capabilities of the physical device, determine a version of the physical device to support via a virtual machine monitor (VMM), and expose a subset of the virtualized capability registers associated with the version to the VM. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: January 17, 2023
    Assignee: INTEL CORPORATION
    Inventors: Sanjay Kumar, Philip R. Lantz, Kun Tian, Utkarsh Y. Kakaiya, Rajesh M. Sankaran
  • Publication number: 20230004409
    Abstract: Persistent storage contains a definition of a playbook and a plurality of subtasks for the playbook, wherein some of the subtasks are respectively associated with corresponding data sources that provide units of related information. One or more processors can: generate a representation of a graphical user interface including a menu pane, a subtask pane, and a related information pane, wherein the menu pane is populated with selectable objects representing the subtasks; receive an indication that a particular selectable object representing a particular subtask has been selected; determine that a particular data source corresponding to the particular subtask can provide a particular unit of the related information; obtain, from the particular data source, the particular unit of the related information; and update the representation to include details of the particular subtask in the subtask pane, and to include the particular unit of the related information in the related information pane.
    Type: Application
    Filed: July 1, 2021
    Publication date: January 5, 2023
    Inventors: Sanjay Kumar Gupta, Vytesh Ramesh, Elizabeth Ilona Szeles, Shilpa Shree Rajashekara, Shankaraiah Onteru, Praneeth Konduri, Jitendra Kumar, Kavita Waldia, Duc Tuan Tran, Amanda Chaffee
  • Publication number: 20230007640
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may establish multiple wireless connections, such as a wireless connection for a first subscriber identity module (SIM) and a wireless connection for a second SIM, that share time-frequency resources. The UE may communicate data packets with another device during a communication session on the wireless connection for the first SIM. The UE may determine to pause the communication session for a duration based on receiving an indication from the other UE or based on a user input to pause communication. The UE may communicate data packets on the wireless connection for the second SIM for at least a portion of the duration using the shared time-frequency resources based on pausing the communication session.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Sanjay Kumar, Bapineedu Chowdary Gumrnadi, Balaji Kannan, Vivek Padi, Arun Ashok Tagare
  • Patent number: 11546254
    Abstract: In one embodiment, a method is performed at a node in a multi-site enterprise fabric. The method includes obtaining map entries from a fabric control plane of the multi-site enterprise fabric, where the map entries are associated with identifiers of endpoints in external networks, site and virtual network identifiers of sites in the multi-site enterprise fabric, location identifiers of border nodes, and characteristics of the border nodes. The method further includes receiving a request from a source to connect to an external endpoint. After deriving an external endpoint identifier and source parameters, the method additionally includes establishing at least one connection between the source and the external endpoint via border node(s) that are selected from the map entries based at least in part on the source parameters, the external endpoint identifier, and characteristics of the border node(s) with their site and virtual network identifier(s) along the at least one connection.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: January 3, 2023
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Prakash Chand Jain, Sanjay Kumar Hooda, Victor M. Moreno, Satish Kumar Kondalam
  • Patent number: 11546209
    Abstract: Systems and techniques for providing more efficient remote provisioning of assets for software applications are provided. Such systems and techniques allow for more flexible distribution of such assets while reducing bandwidth consumption and storage requirements on provisioned devices and reducing delay time from requesting a software application on a remote device and then having the remote device actually execute the requested software application.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: January 3, 2023
    Assignee: Aristocrat Technologies Australia Pty Limited
    Inventors: Jody S. Brown, Christopher G. Fandrich, Sanjay Kumar
  • Patent number: 11528270
    Abstract: Systems and methods for network authorization are described herein. An example method can include receiving a user credential from a host device connected to a network, authenticating the user credential, and in response to authenticating the user credential, determining an authorization policy associated with the host device. The method can also include polling a network overlay control plane of the network to obtain a network location information associated with the host device, identifying at least one network device of the network using the network location information, and transmitting the authorization policy to the at least one network device.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: December 13, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Victor Moreno, Sridhar Subramanian, Sanjay Kumar Hooda
  • Patent number: 11528569
    Abstract: A method for transmitting information for adapting a hearing aid, in which an inquiry with regard to information of a partial process of the adaptation and/or a partial process of an operation of the hearing aid is transmitted by a first participant to a networked computer infrastructure. The inquiry is checked for conformity by the networked computer infrastructure with a plurality of stored partial process instructions. In the event that conformity with the inquiry is ascertained the corresponding partial process instruction is output to the first participant. In the event that no conformity of one of the stored partial process instructions with the inquiry is ascertained, the inquiry is output to a second participant, a partial process instruction corresponding to the inquiry is created with the co-operation of the second participant, and the partial process instruction corresponding to the inquiry is output to the first participant.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: December 13, 2022
    Assignee: SIVANTOS PTE. LTD.
    Inventors: Sanjay Kumar Rudrawal, Balakrishnan Athmanathan, Stefan Aschoff