Patents by Inventor Sanjeev Jain

Sanjeev Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210242897
    Abstract: A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventors: Foad Arfaei Malekzadeh, Sanjeev Jain, Stephen Joseph Kovacic
  • Patent number: 11082515
    Abstract: Technologies for offloading data object replication and service function chain management include a switch communicatively coupled to one or more computing nodes capable of executing virtual machines and storing data objects. The switch is configured to determine metadata of a service function chain, transmit a network packet to a service function of the service function chain being executed by one or more of the computing nodes for processing the network packet. The switch is further configured to receive feedback from service function, update the metadata based on the feedback, and transmit the network packet to a next service function of the service function chain. Additionally or alternatively, the switch is configured to identify a plurality of computing nodes (i.e., storage nodes) at which to store a received data object, replicate the data object based on the number of storage nodes, and transmit each of the received data object and replicated data object(s) to different corresponding storage nodes.
    Type: Grant
    Filed: September 26, 2015
    Date of Patent: August 3, 2021
    Assignee: Intel Corporation
    Inventors: Dinesh Kumar, Nrupal R. Jani, Ren Wang, Christian Maciocco, Sanjeev Jain
  • Patent number: 11080596
    Abstract: The present disclosure is directed to filtering co-occurrence data. In one embodiment, a machine learning model can be trained. An output of an intermediate structure of the machine learning model (e.g., an output of an internal layer of a neural network) can be used as a representation of an event. Similarities between representations of events can be determined and used to generate, augment, or modify co-occurrence data.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: August 3, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Roshan Harish Makhijani, Soo-Min Pantel, Sanjeev Jain, Gaurav Chanda
  • Publication number: 20210218373
    Abstract: Low noise amplifiers (LNAs) with low noise figure are provided. In certain embodiments, an LNA includes a single-ended LNA stage including an input for receiving a single-ended input signal from an antenna and an output for providing a single-ended amplified signal, a balun for converting the single-ended amplified signal to a differential signal, and a variable gain differential amplification stage for amplifying the differential signal from the balun. Implementing the LNA in this manner provides low noise figure, high gain, flexibility in controlling gain, and less sensitivity to ground/supply impedance.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 15, 2021
    Inventors: Sanjeev Jain, Haoran Yu, Nan Sen Lin, Gregory Edward Babcock, Kai Jiang, Hassan Sarbishaei
  • Patent number: 11025259
    Abstract: Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: June 1, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sanjeev Jain, Foad Arfaei Malekzadeh
  • Patent number: 11025258
    Abstract: Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: June 1, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sanjeev Jain, Foad Arfaei Malekzadeh
  • Patent number: 11018714
    Abstract: A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 25, 2021
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Foad Arfaei Malekzadeh, Sanjeev Jain, Stephen Joseph Kovacic
  • Patent number: 10984431
    Abstract: Features are described for improving data transmission by filtering weakly associated items in sequences of item selections. By identifying spurious relationships, data transmissions for weakly related items can be altered or suppressed. The weak relationship may be identified in existing item-to-item associations or for a set of items scheduled for transmission to a user device.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: April 20, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Sanjeev Jain
  • Patent number: 10918231
    Abstract: A temperature regulating beverage container lid is provided. The device has a lid with a top surface, at least one annular sidewall, and an internal wall defining a drinking chamber and a ventilation chamber. The perimeter of the sidewall of the lid can secure over the brim of a beverage container. The drinking chamber has a floor and a drinking spout, the drinking spout in fluid communication with a tubular member. The tubular member, in turn, is in fluid communication with an aperture in the floor. The tubular member is surrounded by a material with a high thermal capacity. An aperture in the top surface of the lid provides ventilation while the ventilation chamber is sized to receive the drinking spout of an identical temperature regulating beverage container lid.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: February 16, 2021
    Inventor: Sanjeev Jain
  • Publication number: 20200356492
    Abstract: Multiprocessor clusters in a virtualized environment conventionally fail to provide memory access security, which is frequently a requirement for efficient utilization in multi-client settings. Without adequate access security, a malicious process may access what might be confidential data that belongs to a different client sharing the multiprocessor cluster. Furthermore, an inadvertent programming error in the code for one client process may accidentally corrupt data that belongs to the different client. Neither scenario is acceptable. Embodiments of the present disclosure provide access security by enabling each processing node within a multiprocessor cluster to virtualize and manage local memory access and only process access requests possessing proper access credentials. In this way, different applications executing on a multiprocessor cluster may be isolated from each other while advantageously sharing the hardware resources of the multiprocessor cluster.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Inventors: Samuel Hammond Duncan, Sanjeev Jain, Mark Douglas Hummel, Vyas Venkataraman, Olivier Giroux, Larry Robert Dennison, Alexander Toichi Ishii, Hemayet Hossain, Nir Haim Arad
  • Patent number: 10789637
    Abstract: A server system increases the diversity of item recommendations provided to a target user by using item similarity data to reorder a ranked list of recommended items for presentation to a user. The reordering is performed such that items identified as similar to each other are spaced apart from each other by at least a minimum number of positions. This minimum number may be selected based, e.g., on how many recommended items will initially be presented on a requesting user device, which may depend on the display size or other attributes of the user device. The server system generates a user interface that displays an initial portion of the reordered list. The user interface includes controls for scrolling through the reordered list.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: September 29, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Sanjeev Jain, Brent Russell Smith, Alexandra Juliet Brasch
  • Patent number: 10769076
    Abstract: Multiprocessor clusters in a virtualized environment conventionally fail to provide memory access security, which is frequently a requirement for efficient utilization in multi-client settings. Without adequate access security, a malicious process may access what might be confidential data that belongs to a different client sharing the multiprocessor cluster. Furthermore, an inadvertent programming error in the code for one client process may accidentally corrupt data that belongs to the different client. Neither scenario is acceptable. Embodiments of the present disclosure provide access security by enabling each processing node within a multiprocessor cluster to virtualize and manage local memory access and only process access requests possessing proper access credentials. In this way, different applications executing on a multiprocessor cluster may be isolated from each other while advantageously sharing the hardware resources of the multiprocessor cluster.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: September 8, 2020
    Assignee: NVIDIA Corporation
    Inventors: Samuel Hammond Duncan, Sanjeev Jain, Mark Douglas Hummel, Vyas Venkataraman, Olivier Giroux, Larry Robert Dennison, Alexander Toichi Ishii, Hemayet Hossain, Nir Haim Arad
  • Publication number: 20200266777
    Abstract: Apparatus and methods for true power detection are provided herein. In certain embodiments, a power amplifier system includes an antenna, a directional coupler, and a power amplifier electrically connected to the antenna by way of a through line of the directional coupler. The power amplifier system further includes a combiner that combines a first coupled signal from a first end of the directional coupler's coupled line with a second coupled signal from a second end of the directional coupler's coupled line.
    Type: Application
    Filed: January 22, 2020
    Publication date: August 20, 2020
    Inventors: Foad Arfaei Malekzadeh, Abdulhadi Ebrahim Abdulhadi, Sanjeev Jain
  • Publication number: 20200169285
    Abstract: A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 28, 2020
    Inventors: Foad Arfaei Malekzadeh, Sanjeev Jain, Stephen Joseph Kovacic
  • Patent number: 10663193
    Abstract: An instant water heater. The instant water heater includes a housing having a transparent reservoir configured to store liquid water. The reservoir includes an inlet and an outlet in fluid communication with a building's existing water supply lines. A plurality of infrared lights are disposed around a perimeter of the reservoir. A plurality of reflectors disposed around each infrared light are configured to direct the emitted light energy to the reservoir, in order to heat the water therein. A control circuit is operably connected to the infrared lights, and is configured to receive input commands and selectively activate the plurality of infrared lights in order to heat water within the reservoir. Other parameters such as a flow rate and water pressure can be monitored and controlled wirelessly or on an included display screen. The device can be utilized to quickly and efficiently heat water to a desired temperature.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: May 26, 2020
    Inventor: Sanjeev Jain
  • Publication number: 20200159669
    Abstract: Multiprocessor clusters in a virtualized environment conventionally fail to provide memory access security, which is frequently a requirement for efficient utilization in multi-client settings. Without adequate access security, a malicious process may access what might be confidential data that belongs to a different client sharing the multiprocessor cluster. Furthermore, an inadvertent programming error in the code for one client process may accidentally corrupt data that belongs to the different client. Neither scenario is acceptable. Embodiments of the present disclosure provide access security by enabling each processing node within a multiprocessor cluster to virtualize and manage local memory access and only process access requests possessing proper access credentials. In this way, different applications executing on a multiprocessor cluster may be isolated from each other while advantageously sharing the hardware resources of the multiprocessor cluster.
    Type: Application
    Filed: November 21, 2018
    Publication date: May 21, 2020
    Inventors: Samuel Hammond Duncan, Sanjeev Jain, Mark Douglas Hummel, Vyas Venkataraman, Olivier Giroux, Larry Robert Dennison, Alexander Toichi Ishii, Hemayet Hossain, Nir Haim Arad
  • Publication number: 20200159654
    Abstract: Apparatuses and methods for pipelined hashing are described herein. An example apparatus to perform a pipelined hash function may include a first memory to store a first plurality of bucket records, a second memory to store a second plurality of bucket records, and a hash circuit to receive a key and to perform a pipelined hash function using the key to provide a hash value. The hash circuit further to select a first bucket record of the first plurality of bucket records from the first memory based on a first subset of bits of the hash value. The hash circuit further to provide a location of a particular entry of an entry record of the plurality of entry records based on contents of the first bucket record and a second subset of bits of the hash value.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Sanjeev Jain, Karl S. Papadantonakis, Robert G. Southworth, Alain Gravel, Jonathan A. Dama
  • Publication number: 20200119741
    Abstract: Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 16, 2020
    Inventors: Sanjeev Jain, Foad Arfaei Malekzadeh
  • Publication number: 20200119742
    Abstract: Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 16, 2020
    Inventors: Sanjeev Jain, Foad Arfaei Malekzadeh
  • Patent number: 10621080
    Abstract: Apparatuses and methods for pipelined hashing are described herein. An example apparatus to perform a pipelined hash function may include a first memory to store a first plurality of bucket records, a second memory to store a second plurality of bucket records, and a hash circuit to receive a key and to perform a pipelined hash function using the key to provide a hash value. The hash circuit further to select a first bucket record of the first plurality of bucket records from the first memory based on a first subset of bits of the hash value. The hash circuit further to provide a location of a particular entry of an entry record of the plurality of entry records based on contents of the first bucket record and a second subset of bits of the hash value.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 14, 2020
    Assignee: Intel Corporation
    Inventors: Sanjeev Jain, Karl S. Papadantonakis, Robert G. Southworth, Alain Gravel, Jonathan A. Dama