Patents by Inventor Sanjeev Kumar

Sanjeev Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153545
    Abstract: Systems and methods are provided for controlling a sleep operation for a memory array. A memory system may include a memory array with a memory cell and a word line driver, the memory array receiving a word line clock signal that enables and disables memory read and write operations of the memory cell. The memory array may further including a switching circuit coupled between the word line driver and a power source, the switching circuit being controlled by a local word line sleep signal to turn power to the word line driver on and off. A latch circuit may generate the local word line sleep signal in response to a delayed clock signal and one or more power management control signals. The word line clock signal and the delayed clock signal may both being generated as a function of a memory clock signal.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventor: Sanjeev Kumar Jain
  • Publication number: 20240132507
    Abstract: Presently provided are inhibitors of TD02 and IDO1 and pharmaceutical compositions thereof, useful for modulating an activity of tryptophan 2,3 dioxygenase and indoleamine 2,3-dioxygenase 1; treating immunosuppression; treating a medical conditions that benefit from the inhibition of tryptophan degradation; enhancing the effectiveness of an anti-cancer treatment comprising administering an anti-cancer agent; and treating tumor-specific immunosuppression associated with cancer.
    Type: Application
    Filed: October 27, 2023
    Publication date: April 25, 2024
    Inventors: Zhonghua Pei, Brendan Parr, Wendy Liu, Richard Pastor, Lewis Gazzard, Firoz Jaipuri, Sanjeev Kumar, Hima Potturi, Guoshen Wu, Xingyu Lin, Yanyan Chu, Po-wai Yuen
  • Publication number: 20240135983
    Abstract: Circuits, systems, and methods are described herein for generating a boost voltage for a write operation of a memory cell. In one embodiment, a boost circuit includes a first inverter and a second inverter, each configured to invert a write signal. The boost circuit also includes a transistor and a capacitor. The transistor is coupled to an output of the first inverter. The transistor is configured to charge a capacitor based on the write signal and provide a supply voltage to a write driver. The capacitor is coupled to an output of the second inverter. The capacitor is configured to generate and provide a delta voltage to the write driver.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventor: Sanjeev Kumar Jain
  • Publication number: 20240129297
    Abstract: A cloud computing platform provides zero trust network access as a service to a customer that maintains an application on-premises. In this context, the customer may be required to demonstrate ownership of a domain before the cloud computing platform will provide access to the on-premises application via the domain.
    Type: Application
    Filed: December 28, 2022
    Publication date: April 18, 2024
    Inventors: Venkata Suresh Reddy Obulareddy, Prashil Rakeshkumar Gupta, Sanjeev Kumar Maheve
  • Publication number: 20240129393
    Abstract: An electronic device includes a device housing and a blade assembly carrying a blade and slidably coupled to the device housing. The electronic device includes a translation mechanism operable to slide the blade assembly relative to the device housing. The electronic device includes one or more processors operable with the translation mechanism. The one or more processors can automatically cause the blade assembly to translate in response to one or more triggers, some of which may be learned by an artificial intelligence classifier.
    Type: Application
    Filed: March 1, 2023
    Publication date: April 18, 2024
    Inventors: Sridhar Vashist, Kathryn Ellen Thomas, Sanjeev Kumar Poluru Venkata, Alexis Grace Valasek, Rohit Sisodia
  • Publication number: 20240129396
    Abstract: An electronic device includes a device housing and a blade assembly carrying a blade and slidably coupled to the device housing. The electronic device includes a translation mechanism operable to slide the blade assembly relative to the device housing. The electronic device includes one or more processors operable with the translation mechanism. The one or more processors automatically transition the blade assembly to the peek position when a front-facing imager or front-facing loudspeaker is required unless a privacy mode of operation is enabled, wherein transition of the blade assembly to the peek position is precluded.
    Type: Application
    Filed: March 1, 2023
    Publication date: April 18, 2024
    Inventors: Sridhar Vashist, Marcello Zuffo, Sanjeev Kumar Poluru Venkata, Thomas Gitzinger, Rohit Sisodia, Kathryn Ellen Thomas, Alexis Grace Valasek
  • Publication number: 20240129398
    Abstract: An electronic device includes a device housing and a blade assembly carrying a blade and slidably coupled to the device housing. The electronic device includes a translation mechanism operable to slide the blade assembly relative to the device housing. The electronic device includes one or more processors operable with the translation mechanism. The one or more processors cause the blade assembly to move to a position where dimensions of a front-facing portion of the flexible display correspond to a preferred aspect ratio for content being presented on the front-facing portion of the flexible display.
    Type: Application
    Filed: March 1, 2023
    Publication date: April 18, 2024
    Inventors: Sanjeev Kumar Poluru Venkata, Rohit Sisodia, Kathryn Ellen Thomas, Alexis Grace Valasek, Sridhar Vashist
  • Patent number: 11960264
    Abstract: A load control system may control an electrical load in a space of a building based on one or more parameters regarding the physical condition of an occupant. The parameters may be gathered by one or more sensing devices. The sensing devices may be included in a mobile device. A system controller may receive the parameters and may automatically control the electrical loads in response to the parameters. The system controller may control the electrical load to attempt to adjust the physical condition of the occupant in response to the sensed parameters. The system controller may control the electrical load to provide an alert, an alarm, and/or a warning in response to the sensed parameters.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: April 16, 2024
    Assignee: Lutron Technology Company LLC
    Inventors: Rhodes B. Baker, Jason C. Killo, Galen Edgar Knode, Sanjeev Kumar, Brent Protzman, Daniel Curtis Raneri, Greg Edward Sloan
  • Publication number: 20240121115
    Abstract: Systems, computer program products, and methods are described herein for monitoring an artificial intelligence (AI) engine. The present invention is configured to receive, from a first network device, a first set of decision parameters associated with an AI engine; encrypt the first set of decision parameters, generating an encrypted dataset; store the encrypted dataset on a transaction object; receive, from a second network device, an output associated with the AI engine; update the transaction object based on the output associated with the AI engine; and transmit a notification to the first network device, wherein the notification comprises a decrypted dataset.
    Type: Application
    Filed: October 10, 2022
    Publication date: April 11, 2024
    Applicant: BANK OF AMERICA CORPORATION
    Inventors: Sanjeev J. Nair, Rahul Kumar Mishra, Pushkar Gahlaut
  • Publication number: 20240119310
    Abstract: Systems, computer program products, and methods are described herein for authentication and monitoring of an artificial intelligence (AI) engine. The present invention is configured to receive, from a first network device, a first set of binary data associated with an AI engine; calculate, based on the first set of binary data, an engine hash value; store the engine hash value; receive, from a second network device, an approval of the first set of binary data; update an approval status of the engine hash value; receive, from a network device associated with a final user, a second set of binary data; determine that a second hash value associated with the second set of binary data matches the engine hash value; and transmit a notification to the network device associated with the final user, wherein the notification instructs the network device to allow the final user to launch the AI engine.
    Type: Application
    Filed: October 8, 2022
    Publication date: April 11, 2024
    Applicant: BANK OF AMERICA CORPORATION
    Inventors: Sanjeev J. Nair, Rahul Kumar Mishra, Pushkar Gahlaut
  • Publication number: 20240119311
    Abstract: Systems, computer program products, and methods are described herein for authentication and monitoring of an artificial intelligence (AI) engine. The present invention is configured to receive, from a first network device, a first set of binary data associated with an AI engine; calculate, based on the first set of binary data, an engine hash value; store the engine hash value; receive, from a second network device, an approval of the first set of binary data; update an approval status of the engine hash value; receive, from a network device associated with a final user, a second set of binary data; determine that a second hash value associated with the second set of binary data matches the engine hash value; and transmit a notification to the network device associated with the final user, wherein the notification instructs the network device to allow the final user to launch the AI engine.
    Type: Application
    Filed: October 10, 2022
    Publication date: April 11, 2024
    Applicant: BANK OF AMERICA CORPORATION
    Inventors: Sanjeev J. Nair, Rahul Kumar Mishra, Pushkar Gahlaut
  • Patent number: 11952380
    Abstract: The invention relates to substituted bicyclic heterocyclic compounds of formula (I), pharmaceutically acceptable salts thereof and pharmaceutical compositions for treating diseases, disorders or conditions associated with the overexpression of PRMT5 enzyme. The invention also relates to methods of treating diseases, disorders or conditions associated with the overexpression of PRMT5 enzyme.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: April 9, 2024
    Assignee: LUPIN LIMITED
    Inventors: Prathap Sreedharan Nair, Ganesh Bhausaheb Gudade, Sachin Sethi, Dipak Raychand Lagad, Chetan Sanjay Pawar, Mahadeo Bhaskar Tryambake, Chaitanya Prabhakar Kulkarni, Anil Kashiram Hajare, Balasaheb Arjun Gore, Sanjeev Anant Kulkarni, Milind Dattatraya Sindkhedkar, Venkata P. Palle, Rajender Kumar Kamboj
  • Publication number: 20240103931
    Abstract: In one example, a method for dynamically scaling computer resources in a cloud computing environment is disclosed. The method includes determining lag state information of a message broker. The message broker handles real-time data exchanged with application instances running in a cloud service. The method includes determining whether the lag state information indicates a change to the application instances running in the cloud service. If the lag state information indicates a change, the method includes providing instructions to the cloud service to alter the application instances.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Prakash Ravi, Maxwell Evers, Amit Kumar Meshram, Sanjeev Medishetty
  • Patent number: 11941564
    Abstract: A site server agent monitors a site server for an event associated with an update process that spans multiple resources associated with multiple systems. The agent hands the monitoring off to a remote connected systems manager when a state associated with the event does not change to an expected value within a configured period of time or based on a configured condition. Connected systems manager continues to monitor the state and elevates the event to a level two incident after a second configured period of time or based on a second configured condition. When the state has still not changed after a third configured period of time or based on a third configured condition, a level one incident is generated in an incident management system associated with the site for support staff to immediately investigate the update process and resources of the systems.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: March 26, 2024
    Assignee: NCR Voyix Corporation
    Inventors: Thomas Kluge, Izham Ismail, Thomas Alfred McQuinlan, Gwendelyn Maglasang Lorzano, Sanjeev Kumar Singh
  • Patent number: 11935589
    Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sanjeev Kumar Jain, Ruchin Jain, Arun Achyuthan, Atul Katoch
  • Publication number: 20240087618
    Abstract: Disclosed herein are related to reducing power consumption of a memory device when transitioning from a sleep state to an operational state. In one aspect, the memory device includes a memory cell to store data. In one aspect, the memory device includes an output driver configured to: generate an output signal indicating the stored data, in response to a sleep tracking signal indicating that the memory cell is in the operational state, and generate the output signal having a predetermined voltage irrespective of the stored data, in response to the sleep tracking signal indicating that the memory cell is in the sleep state. In one aspect, the sleep tracking signal is delayed from a sleep control signal causing the memory cell to operate in the sleep state or the operational state.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sanjeev Kumar Jain, Atul Katoch
  • Patent number: 11929110
    Abstract: A memory circuit includes a global control circuit, a first local control circuit, and a first set of word line post-decoder circuits coupled to a first set of memory cells that is configured to store a first set of data. The global control circuit is configured to generate a first and second set of global pre-decoder signals, and a first set of local address signals. The first local control circuit includes a first set of repeater circuits and a first clock pre-decoder circuit. The first set of repeater circuits is configured to generate a first and second set of local pre-decoder signals in response to the corresponding first and second set of global pre-decoder signals. The first clock pre-decoder circuit is configured to generate a first and second set of clock signals in response to the first set of local address signals and the first clock signal.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sanjeev Kumar Jain, Ishan Khera, Atul Katoch
  • Patent number: 11927624
    Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: March 12, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Harsh Patel, Aalok Dyuti Saha, Sanjeev Praphulla Chandra Nyshadham, Subrato Roy, Gaurav Kumar Mittal
  • Publication number: 20240078289
    Abstract: A device may receive a machine learning model, training data, and test data, and may perform a unit test on the machine learning model to generate unit test results. The device may perform regression tests on the machine learning model, with the training data and the test data, to calculate model scores, create graphs, determine inference delays, and identify missing points for the machine learning model. The device may perform scale and longevity tests on the machine learning model, with the training data and the test data, to identify additional missing points and calculate a resource utilization for the machine learning model. The device may update the machine learning model, to generate an updated machine learning model, based on the unit test results, the model scores, the graphs, the inference delays, the missing points, the additional missing points, or the resource utilization.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Sarath GOLLAPUDI, Pooja Sambhaji AYANILE, Sabyasachi MUKHOPADHYAY, Sanjeev Kumar MISHRA, Rakshith N, Subhabrata BANERJEE, Darshan Tirumale DHANARAJ
  • Patent number: RE49980
    Abstract: A composite coated form of lithium cobalt oxide is described that can achieve improved cycling at higher voltages. Liquid phase and combined liquid and solid phase coating processes are described to effectively form the composite coated powders. The improved cycling positive electrode materials can be effectively combined with either graphitic carbon negative electrode active materials or silicon based high capacity negative electrode active materials. Improved battery designs can achieve very high volumetric energy densities in practical battery formats and with reasonable cycling properties.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: May 21, 2024
    Assignee: Ionblox, Inc.
    Inventors: Sanjeev Sharma, Deepak Kumaar K. Karthikeyan, Charles A. Bowling, Bing Li, Pedro A. Hernández Gallegos, Subramanian Venkatachalam, Herman A. Lopez, Sujeet Kumar