Abstract: Circuits, systems, and methods are described herein for generating a boost voltage for a write operation of a memory cell. In one embodiment, a boost circuit includes a first inverter and a second inverter, each configured to invert a write signal. The boost circuit also includes a transistor and a capacitor. The transistor is coupled to an output of the first inverter. The transistor is configured to charge a capacitor based on the write signal and provide a supply voltage to a write driver. The capacitor is coupled to an output of the second inverter. The capacitor is configured to generate and provide a delta voltage to the write driver.

Abstract: An example system includes: at least one memory; programmable circuitry; and instructions to cause the programmable circuitry to: obtain a public internet protocol (IP) address associated with a household and a timestamp in response to a census impression request indicating a media access on a first client device of the household; obtain a private IP address associated with the first client device; cause storing of the public IP address, the private IP address, and the timestamp in a panelist impression record in association with a panelist identifier, the panelist identifier corresponding to a panelist audience member, the panelist audience member enrolled in a panel of an audience measurement entity; send the census impression request to a census system; and send the panelist impression record to a meter collection system.

Abstract: A system includes an exhaust diffuser system having an axial-radial diffuser and a transition duct. The axial-radial diffuser includes an inlet, an outlet, an axial diffuser portion between the inlet and the outlet, and a radial diffuser portion between the axial diffuser portion and the outlet, wherein the inlet is configured to couple to a gas turbine system. The transition duct is coupled to the axial-radial diffuser, wherein the outlet is disposed inside of an intake portion of the transition duct, and the transition duct includes a discharge portion configured to couple to a heat recovery steam generator (HRSG).

Abstract: An electronic device includes a device housing and a blade assembly carrying a blade and slidably coupled to the device housing. The electronic device includes a translation mechanism operable to slide the blade assembly relative to the device housing. The electronic device includes one or more processors operable with the translation mechanism. The one or more processors automatically transition the blade assembly to the peek position when a front-facing imager or front-facing loudspeaker is required unless a privacy mode of operation is enabled, wherein transition of the blade assembly to the peek position is precluded.

Abstract: Circuits and methods are described herein for controlling a bit line precharge circuit. For example, a control circuit includes a first latch circuit and a second latch circuit. The first latch circuit is configured to receive a first light sleep signal. The first latch circuit generates a second light sleep signal according to a clock signal. The second latch circuit is configured to receive the second light sleep signal. The second latch circuit generates a third light sleep signal according to a sense amplifier enable signal. The second latch circuit provides the third light sleep signal to a bit line reading switch, so the bit line reading switch is cutoff after a sense amplifier is enabled.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a memory array with a plurality of memory cells, first logic circuitry, first switching circuitry, first latch circuitry, and second switching circuitry. The first logic circuitry may be configured to generate a first bit line pre-charge signal for a first memory cell of the plurality of memory cells, where the first bit line pre-charge signal is generated in response to a sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal. The first latch circuit may receive the sleep signal and the first bit line pre-charge signal and generate a delayed sleep signal.

Abstract: A load control system may be commissioned using beacons. The load control system may include control devices that each include a beacon transmitting circuit configured to transmit a beacon that comprises an identifier associated with the control device. A network device, such as a mobile device, may discover a control device based on the beacon received from the control device. In response to discovery of the control device, the control device may be added to a temporary group of control devices for being collectively configured and/or controlled. Control devices may be discovered based on the signal strength at which the beacons are received. The control devices may provide feedback to a user in response to confirmation messages to indicate to a user that the lighting control device has been added to the temporary group. The control devices may stop providing the feedback after they are removed from the temporary group.

Abstract: A load control system may be configured using a graphical user interface (GUI) software. The GUI software may be implemented to collect control devices and add the control devices to the load control system for configuration. Programming data may be automatically determined for the added control devices based on the type of control device, the location of the control device, and/or the load type controlled by the control device. The programming data may include control settings for a scene, a schedule, or an automated control feature. The programming data may be displayed for being viewed and/or adjusted by a user. The programming data may be transmitted to the control devices and/or a system controller for being implemented in performing load control.

Abstract: In aspects of context-based interactive telephone menu navigation, a media device obtains an interactive telephone menu associated with a product correlated with a user profile. The media device identifies an automated navigation of the interactive telephone menu based on the product and injects one or more automated menu inputs of the automated navigation to reach a navigation point of the interactive telephone menu associated with the product.

Abstract: In aspects of interactive telephone system navigation, a media device maintains a record of menu inputs to navigate an interactive telephone menu based on a first call and associates a telephone number of the first call with the record. The media device detects the telephone number initiated for a second call and provides an automated navigation of the interactive telephone menu during the second call.

Abstract: The present invention relates to a composition comprising high purity pyrrole derivative and method for preparation thereof. The present invention particularly relates to compositions comprising Saroglitazar magnesium having purity of 99.0% or more, and one or more of an aldehyde compound of Formula (II), diketo oxirane compound of Formula (III), hydroxy methyl compound of Formula (IV) or dimer compound of Formula (V), relative to saroglitazar magnesium, each present in an amount of about 0.15% or less, respectively, by weight, when measured by area percentage of HPLC.

Abstract: A computer-implemented method includes receiving data packets that each encode a data transmission. The data packets include real-time data packets and non-real-time data packets. The method further includes comparing at least a portion of each of the data packets with a characterization sequence, where the real-time data packets are identified based on the portion of the real-time data packets matching the characterization sequence. The non-real-time data packets are identified based on the portion of the real-time data packets not matching the characterization sequence. The method also includes generating a real-time sequence and a non-real-time sequence of data packets. Furthermore, the method includes providing the real-time sequence to a communication interface to transmit the real-time sequence to a real-time processing system. Moreover, the method includes providing the non-real-time sequence to the communication interface to transmit the non-real-time sequence to a non-real-time processing system.

Abstract: A memory cell is configured to store data and operate in an operational state or a sleep state. A first set of transistors is configured to transfer data from the data sensing node of the memory cell to a data latch node, in response to the memory cell being in the operational state. A second set of transistors is configured to latch the data at the data latch node, in response to the memory cell being in the operational state. A third set of transistors is configured to latch the data at the data latch node, in response to the memory cell being in the sleep state. The first set of transistors is further configured to transfer the data from the data latch node to the data sensing node of the memory cell, in response to the memory cell being transitioned from the sleep state to the operational state.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to identify main page views. An example apparatus includes at least one memory, machine readable instructions, and processor circuitry to at least one of instantiate or execute the machine readable instructions to: access a log of requests from a proxy, the log of requests including main page requests and embedded page requests, the log of requests including timestamps corresponding to the main page requests and the embedded page requests, identify, based on consecutive ones of the timestamps occurring within a time interval, at least one of the main page requests associated with the time interval, and credit the at least one of the main page requests as a main page view.

Abstract: Circuits and methods are described herein for controlling a bit line precharge circuit. For example, a control circuit includes a first latch circuit and a second latch circuit. The first latch circuit is configured to receive a first light sleep signal. The first latch circuit generates a second light sleep signal according to a clock signal. The second latch circuit is configured to receive the second light sleep signal. The second latch circuit generates a third light sleep signal according to a sense amplifier enable signal. The second latch circuit provides the third light sleep signal to a bit line reading switch, so the bit line reading switch is cutoff after a sense amplifier is enabled.

Abstract: Techniques are described for predicting future behavior of links in a network and generating dynamic thresholds for link metrics for use in path selection. In one example, a computing system receives historical values of a link metric for links of a network. The computing system executes a machine learning system which processes the historical values of the link metric to generate: (1) a predicted future value of the link metric for each link; and (2) a threshold for the link metric indicating whether the predicted future value for each link is anomalous. The computing system computes a path based on the predicted future values of the link metric and the threshold for the link metric. The computing system provisions the computed path, thereby enabling a network device to forward network traffic along the computed path.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a memory array with a plurality of memory cells, first logic circuitry, first switching circuitry, first latch circuitry, and second switching circuitry. The first logic circuitry may be configured to generate a first bit line pre-charge signal for a first memory cell of the plurality of memory cells, where the first bit line pre-charge signal is generated in response to a sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal. The first latch circuit may receive the sleep signal and the first bit line pre-charge signal and generate a delayed sleep signal.

Abstract: A load control system may be commissioned using beacons. The load control system may include control devices that each include a beacon transmitting circuit configured to transmit a beacon that comprises an identifier associated with the control device. A network device, such as a mobile device, may discover a control device based on the beacon received from the control device. In response to discovery of the control device, the control device may be added to a temporary group of control devices for being collectively configured and/or controlled. Control devices may be discovered based on the signal strength at which the beacons are received. The control devices may provide feedback to a user in response to confirmation messages to indicate to a user that the lighting control device has been added to the temporary group. The control devices may stop providing the feedback after they are removed from the temporary group.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a first memory cell, a first buffer, first logic circuitry, and first switching circuitry. The first memory cell may be configured to pre-charge in response to receiving a primary sleep signal. The first buffer may be configured to receive the primary sleep signal, generate a delayed primary sleep signal, and provide the delayed primary sleep signal to a second memory cell. The first logic circuitry may be configured to generate a first bit line pre-charge signal for the first memory cell of the plurality of memory cells in response to a looped sleep signal, wherein the looped sleep signal is generated based on the delayed primary sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal.

Abstract: A load control system for controlling an electrical load in a space of a building occupied by an occupant may include a controller configured to determine the location of the occupant, and a load control device configured to automatically control the electrical load in response to the location of the occupant. The load control system may include a mobile device adapted to be located on or immediately adjacent the occupant and configured to transmit and receive wireless signals. The load control device may be configured to automatically control the electrical load when the mobile device is located in the space. The load control system may further comprise an occupancy sensor and the load control device may automatically control the electrical load when the occupancy sensor indicates that the space is occupied and the mobile device is located in the space.