Patents by Inventor Sanjeev Kumar

Sanjeev Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230222527
    Abstract: Natural Language Processing (NLP) techniques are used to facilitate inferring actionable insights from interactions. Customer data from various communication channels can be used to determine, for example, voice-related aspects from sentiment analysis, intent analysis, Semantic Conscious Word Extraction (SCWE), emotion analysis, and contextual summarization. These analysis results can also be used, along with customer profile information, for deriving deep customer insights. The deep customer insight driven analysis can include multivariate customer fragmentation, setback accountability analysis, potential contender analysis, and propulsive business planning.
    Type: Application
    Filed: January 9, 2023
    Publication date: July 13, 2023
    Inventors: Sai Prasanth Singavarapu, Rhea Thomas, Priyanka Satish, V Vikash Kumaran, Ram Prakash S, Sanjeev Kumar Srinivasan Khannan, Karthick S, Hari Bharathi A, Azarudeen Mohamed Ibrahim
  • Publication number: 20230223076
    Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.
    Type: Application
    Filed: March 23, 2023
    Publication date: July 13, 2023
    Inventors: Sanjeev Kumar Jain, Ruchin Jain, Arun Achyuthan, Atul Katoch
  • Patent number: 11700147
    Abstract: A load control system may include control devices for controlling power provided to an electrical load. The control devices may include a control-source device and a control-target device. The control-target device may control the power provided to the electrical load based on digital messages received from the control-source device. The control devices may include a load control discovery device capable of sending discovery messages configured to discover control devices within a location. The discovered control devices may be organized by signal strength and may be provided to a network device to enable association of the discovered control devices within a location. The discovery messages may be transmitted within an established discovery range. The discovery range may be adjusted to discover different control devices. Different control devices may be identified as the load control discovery device for discovering different control devices.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: July 11, 2023
    Assignee: Lutron Technology Company LLC
    Inventors: Kyle Thomas Barco, Bryan Robert Barnes, Erica L. Clymer, Brian Michael Courtney, Jordan H. Crafts, William Bryce Fricke, Galen Edgar Knode, Sanjeev Kumar, Jonathan T. Lenz, Stephen M. Ludwig, Jr., Sandeep Mudabail Raghuram, Richard M. Walsh, III
  • Publication number: 20230214304
    Abstract: In general, a device comprising a processor and a memory may be configured to perform various aspects of the techniques described in this disclosure. The processor may conduct, based on configuration parameters, each of a plurality of simulation iterations within the test environment to collect a corresponding plurality of simulation datasets representative of operating states of the network device. The processor may perform a regression analysis with respect to each of the plurality of configuration parameters and each of the plurality of simulation datasets to generate a light weight model representative of the network device that predicts an operating state of the network device. The processor may output the light weight model for use in a computing resource restricted network device to enable prediction of the operating state of the computing resource restricted network device when configured with the configuration parameters. The memory may store the light weight model.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Inventors: Sanjeev Kumar Mishra, Ankur Neog, Ramakrishnan Rajagopalan, Ravindran Thangarajah, Shamantha Krishna K G
  • Publication number: 20230216935
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to identify main page views. An example apparatus includes at least one memory, machine readable instructions, and processor circuitry to at least one of instantiate or execute the machine readable instructions to: access a log of requests from a proxy, the log of requests including main page requests and embedded page requests, the log of requests including timestamps corresponding to the main page requests and the embedded page requests, identify, based on consecutive ones of the timestamps occurring within a time interval, at least one of the main page requests associated with the time interval, and credit the at least one of the main page requests as a main page view.
    Type: Application
    Filed: July 28, 2022
    Publication date: July 6, 2023
    Inventor: Sanjeev Kumar Viswambharan
  • Patent number: 11690157
    Abstract: A load control system may include control devices capable of being associated with each other at one or more locations for performing load control. Control devices may include control-source devices and/or control-target devices. A location beacon may be discovered and a unique identifier in the location beacon may be associated with a unique identifier of one or more control devices. Upon subsequent discovery of the location beacon, the associated load control devices may be controlled. The beacons may be communicated via radio frequency signals, visible light communication, and/or audio signals. The visible light communication may be used to communicate other types of information to devices in the load control system. The visible light communication may be used to identify link addresses for communicating with load control devices, load control instructions, load control configuration instructions, network communication information, and/or the like.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: June 27, 2023
    Assignee: Lutron Technology Company LLC
    Inventors: Rhodes B. Baker, Kyle Thomas Barco, Bryan Robert Barnes, John H. Bull, Richard S. Camden, Jordan H. Crafts, David J. Dolan, Jason Groller, Sanjeev Kumar, Jonathan T. Lenz, Miguel Aguado Pelaez, Daniel L. Twaddell
  • Publication number: 20230198937
    Abstract: An example system includes: at least one memory; programmable circuitry; and instructions to cause the programmable circuitry to: obtain a public internet protocol (IP) address associated with a household and a timestamp in response to a census impression request indicating a media access on a first client device of the household; obtain a private IP address associated with the first client device; cause storing of the public IP address, the private IP address, and the timestamp in a panelist impression record in association with a panelist identifier, the panelist identifier corresponding to a panelist audience member, the panelist audience member enrolled in a panel of an audience measurement entity; send the census impression request to a census system; and send the panelist impression record to a meter collection system.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 22, 2023
    Inventors: Sanjeev Kumar Viswambharan, Achilleas Papakostas
  • Patent number: 11682434
    Abstract: Systems and methods are provided for controlling power down of an integrated dual rail memory circuit. The power down system is configured to power down the power rail for input and logic components (VDD) while maintaining power to the power rail for the memory cells (VDDM). The power down system includes two voltage rails, a clock generator, and a power detector for detecting the power on VDD. The power detector generates an isolated power signal when voltage on VDD is below a voltage threshold. The isolated power signal is configured to disable the clock generator and thus reduce dynamic power as the read/write cycle is not triggered during power down.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Sanjeev Kumar Jain
  • Publication number: 20230183353
    Abstract: The present invention relates to Fc variant protein and preparation thereof. Said Fc variant has altered binding affinity towards FcRn. Fc variant prepared according to the current invention can be used for making FcRn antagonist composition or can be used for making an Fc variant containing drug or molecule with altered effector function.
    Type: Application
    Filed: May 21, 2021
    Publication date: June 15, 2023
    Inventors: Sanjeev Kumar MENDIRATTA, Ramkrashan KASERA, Arun Kumar SINGH, Aashini PARIKH, Pankaj KALITA, Satish HANDA, Anushree SHAH, Heena PATEL, Hardik PANDYA, Vibhuti SHARMA, Chirag PATEL, Swagat SONI, Narayani VYAS
  • Publication number: 20230178122
    Abstract: Disclosed herein are related to reducing power consumption of a memory device when transitioning from a sleep state to an operational state. In one aspect, the memory device includes a memory cell to store data. In one aspect, the memory device includes an output driver configured to: generate an output signal indicating the stored data, in response to a sleep tracking signal indicating that the memory cell is in the operational state, and generate the output signal having a predetermined voltage irrespective of the stored data, in response to the sleep tracking signal indicating that the memory cell is in the sleep state. In one aspect, the sleep tracking signal is delayed from a sleep control signal causing the memory cell to operate in the sleep state or the operational state.
    Type: Application
    Filed: April 6, 2022
    Publication date: June 8, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sanjeev Kumar Jain, Atul Katoch
  • Patent number: 11670365
    Abstract: Circuits and methods are described herein for controlling a bit line precharge circuit. For example, a control circuit includes a first latch circuit and a second latch circuit. The first latch circuit is configured to receive a first light sleep signal. The first latch circuit generates a second light sleep signal according to a clock signal. The second latch circuit is configured to receive the second light sleep signal. The second latch circuit generates a third light sleep signal according to a sense amplifier enable signal. The second latch circuit provides the third light sleep signal to a bit line reading switch, so the bit line reading switch is cutoff after a sense amplifier is enabled.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Sanjeev Kumar Jain
  • Publication number: 20230170010
    Abstract: A memory circuit includes a global control circuit, a first local control circuit, and a first set of word line post-decoder circuits coupled to a first set of memory cells that is configured to store a first set of data. The global control circuit is configured to generate a first and second set of global pre-decoder signals, and a first set of local address signals. The first local control circuit includes a first set of repeater circuits and a first clock pre-decoder circuit. The first set of repeater circuits is configured to generate a first and second set of local pre-decoder signals in response to the corresponding first and second set of global pre-decoder signals. The first clock pre-decoder circuit is configured to generate a first and second set of clock signals in response to the first set of local address signals and the first clock signal.
    Type: Application
    Filed: May 17, 2022
    Publication date: June 1, 2023
    Inventors: Sanjeev Kumar JAIN, Ishan KHERA, Atul KATOCH
  • Publication number: 20230145432
    Abstract: Agrochemical aqueous formulations comprising A) An agriculturally acceptable salt of dicamba, B) At least one anionic surfactant that comprises at least one naphthalene sulfonate C) an aqueous solvent, D) Optionally at least one thickener, E) Optionally other pesticides, F) Optionally other formulation auxiliaries.
    Type: Application
    Filed: March 31, 2020
    Publication date: May 11, 2023
    Inventors: Christian Sowa, Klaus Kolb, Michael Krapp, Wolfgang Meier, Steven Joseph Bowe, Sanjeev Kumar Bangarwa, Matthias Bratz, Anja Simon, Claude Taranta, Marc Nolte
  • Patent number: 11634663
    Abstract: The present disclosure provides a laundry care composition having at least one laundry care ingredient and at least one leuco composition conforming to Formula (I): Ar1Ar2Ar3CH??(I) wherein Ar2 and Ar3 are independently a carbocyclic aryl or heteroaryl, and Ar1 is selected from the group consisting of: unsubstituted phenyl, electron deficient carbocyclic aryl, and heteroaryl. The present disclosure also provides a method of determining an authentic laundry care composition and test kits for detecting authentic laundry care compositions.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 25, 2023
    Assignee: The Procter & Gamble Company
    Inventors: Gregory Scot Miracle, Daniel Dale Ditullio, Jr., Sanjeev Kumar Dey, Haihu Qin
  • Publication number: 20230119503
    Abstract: A cluster of nodes are sequentially updated with new network configuration settings in order to maintain availability of the cluster during the update. In the sequential update, each node conditionally updates network configuration settings, tests connectivity, and retains an update to the configuration only if the node is able to restore connectivity suitable for operation in the cluster.
    Type: Application
    Filed: March 9, 2022
    Publication date: April 20, 2023
    Inventors: Sanjeev Kumar Maheve, Thiyagu Rajendran
  • Patent number: 11626158
    Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: April 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sanjeev Kumar Jain, Ruchin Jain, Arun Achyuthan, Atul Katoch
  • Publication number: 20230092073
    Abstract: One or more computer operations are triggered and executed when multiple sets of conditions that define a split trigger and that are evaluated at multiple locations are satisfied. The operations may involve allocating or deallocating computing resources (e.g., by establishing or tearing down a persistent connection), generating a message to be displayed on a computing device, altering stored data, and/or other activity. In an illustrative client/server computing environment, a first set of client conditions of a first split trigger is evaluated at a client device, using parameters observable at the client without interaction with a server. When the first of client conditions is satisfied, the client transmits a signal to a server that then evaluates a first set of server conditions of the first split trigger. If the first sets of client conditions and server conditions are satisfied, the computer operation(s) associated with the split trigger are executed.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Applicant: Zendesk, Inc.
    Inventors: Sanjeev Kumar Biswas, Nguyen Truong Khanh, Ang Yi Hong, Sanjaykrishnan Kumar, Arpan Nagdeve
  • Patent number: 11606251
    Abstract: Techniques for deploying a server stack having a cross-server dependency are disclosed. A deployment engine initiates a deployment process for a server stack. The deployment engine provisions servers of one server type (“requisite servers”). The deployment engine attempts to provision servers of another server type (“dependent servers”). The deployment engine executes a test that requires the dependent servers to invoke a service executed by the requisite servers. Based on the test results, the deployment engine determines that an operational requirement of the dependent servers is not satisfied. The deployment engine modifies a configuration for the requisite servers to satisfy the operational requirement of the dependent servers. The deployment engine re-provisions the requisite servers using the modified configuration. The deployment engine completes the deployment process for the server stack.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 14, 2023
    Assignee: Oracle International Corporation
    Inventors: Pradip Kumar Pandey, Steven Mark Fillipi, Clayton Drew Seeley, Karthik M U, Sanjeev Kumar Sharma
  • Publication number: 20230072988
    Abstract: The present invention provides for a system (100) and a method for generating smart contracts for blockchain platforms. An input received as natural language text is processed into a first parameter to generate a Domain Specific Language (DSL) construct. DSL construct is disintegrated into a stream of tokens and a syntax analysis is performed on the stream of tokens to check if the syntax of the DSL construct matches with a grammar file defined for the DSL construct. Each of the marked lines of the stream of tokens is read and the read marked lines are transformed into an organized structure. A file specific to a target blockchain platform is generated based on a second parameter and the organized structure is mapped with the generated file associated with the target blockchain platform to generate a target code template for generating a deployable target smart contract for the target blockchain platform.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 9, 2023
    Inventors: Biju Mathews, Sanjeev Kumar Madhavan, Karthik Ganti, Chakkirala Venkata Sai Kalyani, Agnelo Marques
  • Patent number: D986917
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: May 23, 2023
    Assignee: Lutron Technology Company LLC
    Inventors: Rhodes B. Baker, John H. Bull, Erica L. Clymer, Sanjeev Kumar, Jennifer Wong