Abstract: Techniques are disclosed for managing delivery of content and tracking the same via audio cues. For example, a client computing device may monitor ambient sound for audio that matches audio sampled from broadcast content. In response to detecting matching audio, the client computing device transmits tracking data to a centralized content server. The content server records the tracking information and evaluates whether the matching audio was detected within a geographic area associated with the broadcast content. If so, the content server executes additional actions including transmitting supplemental content to the client computing device and/or updating summary level metrics that indicate receptions of broadcast content within target geographic locations.

Abstract: A system provides document storage and sharing on behalf of nodes of a blockchain system. The system includes one or more databases and one or more servers. The one or more servers receive file content of a document from a first node of the blockchain system and stores the file content in the one or more databases. A file hash of the document is generated by applying a hash function to the file content. The file hash is sent to the first node, such as for sharing with one or more other authorized nodes. The one or more servers receives a request for the document from a second node of the blockchain system, the request including the file hash. In response, the one or more servers send the file content of the document to the second node.

Abstract: Systems and method are provided for operating a multi-array memory that includes a left memory array and a right memory array of a memory bank. A command is received at memory input pins. A signal representative of the command is propagated to an array control inhibitor. An array inhibit command is received on one or more other pins of the memory and provided to the array control inhibitor. The array control inhibitor is used to prevent arrival of the command to one of the left memory array and the right memory array based on the array inhibit command.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a memory array with a plurality of memory cells, first logic circuitry, first switching circuitry, first latch circuitry, and second switching circuitry. The first logic circuitry may be configured to generate a first bit line pre-charge signal for a first memory cell of the plurality of memory cells, where the first bit line pre-charge signal is generated in response to a sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal. The first latch circuit may receive the sleep signal and the first bit line pre-charge signal and generate a delayed sleep signal.

Abstract: A load control system may include control devices for controlling power provided to an electrical load. The control devices may include a control-source device and a control-target device. The control-target device may control the power provided to the electrical load based on digital messages received from the control-source device. The control devices may include a load control discovery device capable of sending discovery messages configured to discover control devices within a location. The discovered control devices may be organized by signal strength and may be provided to a network device to enable association of the discovered control devices within a location. The discovery messages may be transmitted within an established discovery range. The discovery range may be adjusted to discover different control devices. Different control devices may be identified as the load control discovery device for discovering different control devices.

Abstract: A system provides document storage and sharing on behalf of nodes of a blockchain system. The system includes one or more databases and one or more servers. The one or more servers receive file content of a document from a first node of the blockchain system and stores the file content in the one or more databases. A file hash of the document is generated by applying a hash function to the file content. The file hash is sent to the first node, such as for sharing with one or more other authorized nodes. The one or more servers receives a request for the document from a second node of the blockchain system, the request including the file hash. In response, the one or more servers send the file content of the document to the second node.

Abstract: The present invention relates to a process for the continuous preparation of a polyolefin from one or more ?-olefin monomers in a reactor system, the process for the continuous preparation of polyolefin comprising the steps of: feeding a polymerization catalyst to a fluidized bed through an inlet for a polymerization catalyst; feeding the one or more monomers to the reactor, polymerizing the one or more monomers in the fluidized bed to prepare the polyolefin; withdrawing polyolefin formed from the reactor through an outlet for polyolefin; withdrawing fluids from the reactor through an outlet for fluids and transporting the fluids through first connection means, an heat exchanger to cool the fluids to produce a cooled recycle stream, and through second connection means back into the reactor via an inlet for the recycle stream; wherein a thermal run away reducing agent (TRRA) is added to the reactor in a discontinuous way.

Abstract: Systems and methods are provided for controlling a sleep operation for a memory array. A memory system may include a memory array with a memory cell and a word line driver, the memory array receiving a word line clock signal that enables and disables memory read and write operations of the memory cell. The memory array may further including a switching circuit coupled between the word line driver and a power source, the switching circuit being controlled by a local word line sleep signal to turn power to the word line driver on and off. A latch circuit may generate the local word line sleep signal in response to a delayed clock signal and one or more power management control signals. The word line clock signal and the delayed clock signal may both being generated as a function of a memory clock signal.

Abstract: Project asset and preference sharing techniques are described. In one or more embodiments, a request is received to assign a project asset or preference to a member of a team. The received request includes an identifier of a project for which the project asset or preference will be assigned. To assign the asset or preference specified in the request, a list of teams to which the member belongs is ascertained. The assets and preferences associated with each of the teams are then checked for the identifier to identify the project assets and preferences associated with the project. Once the project assets and preferences associated with the project are identified, a response is generated for communication to the member. The response is configured to include indications of the identified project assets and preferences that enable the member to access the identified project assets and preferences via the application, such that the member is also given access to the assigned project asset or preference.

Abstract: A site server agent monitors a site server for an event associated with an update process that spans multiple resources associated with multiple systems. The agent hands the monitoring off to a remote connected systems manager when a state associated with the event does not change to an expected value within a configured period of time or based on a configured condition. Connected systems manager continues to monitor the state and elevates the event to a level two incident after a second configured period of time or based on a second configured condition. When the state has still not changed after a third configured period of time or based on a third configured condition, a level one incident is generated in an incident management system associated with the site for support staff to immediately investigate the update process and resources of the systems.

Abstract: Order details for an order is evaluated based on real-time data associated with establishments that can satisfy the order, location data, traffic conditions, estimated order preparation times, and available delivery personnel (when the order is associated with a delivery). An optimal establishment that can fulfill the order is selected and the order with the order details is placed with the optimal establishment. In an embodiment, the real-time data continues to be evaluated after the order is placed, and when conditions warrant the order is redirected to a new optimal establishment for fulfillment.

Abstract: Circuits, systems, and methods are described herein for generating a boost voltage for a write operation of a memory cell. In one embodiment, a boost circuit includes a first inverter and a second inverter, each configured to invert a write signal. The boost circuit also includes a transistor and a capacitor. The transistor is coupled to an output of the first inverter. The transistor is configured to charge a capacitor based on the write signal and provide a supply voltage to a write driver. The capacitor is coupled to an output of the second inverter. The capacitor is configured to generate and provide a delta voltage to the write driver.

Abstract: A memory device is disclosed. The memory device includes a memory array including a first memory cell arranged in a first row and a first column and a second memory cell arranged in the first row and a second column next to the first column. The first memory cell is configured to perform a write operation in response to a first write signal transmitted through a first write word line. The second memory cell is configured to perform the write operation in response to a second write signal transmitted through a second write word line. The second write word line is separated from and next to the first write word line. The first write signal and the second write signal have different logic values.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.

Abstract: A method for performing hierarchical entity classification of an entity mention within a context, wherein ontological classes are computed for the entity mention levelwise using a contextual representation of the context and a state representation obtained by running an end-to-end trained decoding recurrent neural network on a mention representation of the entity mention.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit may include a memory array with a plurality of memory cells, first logic circuitry, first switching circuitry, first latch circuitry, and second switching circuitry. The first logic circuitry may be configured to generate a first bit line pre-charge signal for a first memory cell of the plurality of memory cells, where the first bit line pre-charge signal is generated in response to a sleep signal. The first switching circuitry may be configured to provide power to one or more bit line of the first memory cell in response to the first bit line pre-charge signal. The first latch circuit may receive the sleep signal and the first bit line pre-charge signal and generate a delayed sleep signal.

Abstract: A load control system may include control devices for controlling power provided to an electrical load. The control devices may include a control-source device and a control-target device. The control-target device may control the power provided to the electrical load based on digital messages received from the control-source device. The control devices may include a load control discovery device capable of sending discovery messages configured to discover control devices within a location. The discovered control devices may be organized by signal strength and may be provided to a network device to enable association of the discovered control devices within a location. The discovery messages may be transmitted within an established discovery range. The discovery range may be adjusted to discover different control devices. Different control devices may be identified as the load control discovery device for discovering different control devices.

Abstract: A load control system for controlling an electrical load in a space of a building occupied by an occupant may include a controller configured to determine the location of the occupant, and a load control device configured to automatically control the electrical load in response to the location of the occupant. The load control system may include a mobile device adapted to be located on or immediately adjacent the occupant and configured to transmit and receive wireless signals. The load control device may be configured to automatically control the electrical load when the mobile device is located in the space. The load control system may further comprise an occupancy sensor and the load control device may automatically control the electrical load when the occupancy sensor indicates that the space is occupied and the mobile device is located in the space.

Abstract: Circuits, systems, and methods are described herein for generating a boost voltage for a write operation of a memory cell. In one embodiment, a boost circuit includes a first inverter and a second inverter, each configured to invert a write signal. The boost circuit also includes a transistor and a capacitor. The transistor is coupled to an output of the first inverter. The transistor is configured to charge a capacitor based on the write signal and provide a supply voltage to a write driver. The capacitor is coupled to an output of the second inverter. The capacitor is configured to generate and provide a delta voltage to the write driver.