Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example method may include patterning a working surface of a semiconductor wafer. The method may further include performing a vapor etch on a first dielectric material at the working surface to recess the first dielectric material to a first intended depth of an opening relative to the working surface and to expose a second dielectric material on a sidewall of the opening. The method may further include performing a wet etch on the second dielectric material to recess the second dielectric material to the intended depth.

Abstract: An example method includes patterning a working surface of a semiconductor wafer. The example method includes performing a first deposition of a dielectric material in high aspect ratio trenches. The example method further includes performing a high pressure, high temperature vapor etch to recess the dielectric material in the trenches and performing a second deposition of the dielectric material to continue filling the trenches.

Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.

Abstract: Some embodiments include a method in which an assembly is formed to have a first silicon-dioxide-containing-material and a second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material has a higher concentration of dopant therein than does the second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material is selectively removed relative to the second silicon-dioxide-containing-material using a mixture which includes hydrofluoric acid, a second acid and an organic solvent. The organic solvent may include at least one ester and/or at least one ether. The second acid may have a pKa of less than about 5.

Abstract: Methods, apparatuses, and systems related to shaping a storage node material are described. An example method includes forming a pillar with a pattern of materials. The method further includes depositing a storage node material on a side of the pillar. The method further includes etching sacrificial materials within the pillar. The method further includes etching the storage node material in a direction from the pillar into the storage node.

Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.

Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.

Abstract: Methods, apparatuses, and systems related to forming a recess in a semiconductor structure are described. An example method includes etching the semiconductor structure using an elevated temperature dilution of acid and water. The method further includes etching the semiconductor structure using a room temperature wet etch of acid and water and a surface modification chemistry.

Abstract: Methods, apparatuses, and systems related to reduction of tapering on a sidewall of an opening are described. An example method includes forming a silicate material comprising a gradient borophosphosilicate glass (BPSG) stack on a semiconductor structure. The example method further includes etching a portion of the silicate material to form an opening within the silicate material having sidewalls, wherein the gradient BSPG stack comprises varying concentrations of boron and phosphorous to reduce tapering of the sidewalls in response to the etching.

Abstract: Methods, apparatuses, and systems related to reduction of tapering on a sidewall of an opening are described. An example method includes forming a silicate material comprising a gradient borophosphosilicate glass (BPSG) stack on a semiconductor structure. The example method further includes etching a portion of the silicate material to form an opening within the silicate material having sidewalls, wherein the gradient B SPG stack comprises varying concentrations of boron and phosphorous to reduce tapering of the sidewalls in response to the etching.

Abstract: Methods, apparatuses, and systems related to forming a capacitor column using a sacrificial material are described. An example method includes patterning a surface of a semiconductor substrate having: a first silicate material over the substrate, a first nitride material over the first silicate material, a sacrificial material over the first nitride material, a second silicate material over the sacrificial material, and a second nitride material over the second silicate material. The method further includes forming a column of capacitor material in an opening through the first silicate material, the first nitride material, the sacrificial material, the second silicate material, and the second nitride material. The method further includes removing the sacrificial material.

Abstract: Methods, apparatuses, and systems related to forming a capacitor using a hard mask material are described. An example method includes patterning a surface to have a first silicate material, a first nitride material on the first silicate material, a second silicate material on the first nitride material, a second nitride material on the second silicate material, and a sacrificial material on the second nitride material. The method further includes forming a hard mask material on the sacrificial material. The method further includes forming a capacitor material in an opening through the first silicate material, the first nitride material, the second silicate material, the second nitride material, the sacrificial material, and the hard mask material. The method further includes removing the sacrificial material and the hard mask material.

Abstract: Methods, apparatuses, and systems related to forming a capacitor using a sacrificial material are described. An example method includes forming a first silicate material on a substrate. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a sacrificial material on the second nitride material. The method further includes forming a column of capacitor material through the first silicate material, the first nitride material, the second silicate material, the second nitride material, and the sacrificial material. The method further includes removing the sacrificial material to expose a top portion of the capacitor material.

Abstract: Various embodiments comprise methods of selectively etching oxides over nitrides in a vapor-etch cyclic process. In one embodiment, the method includes, in a first portion of the vapor-etch cyclic process, exposing a substrate having oxide features and nitride features formed thereon to selected etchants in a vapor-phase chamber; transferring the substrate to a post-etch heat treatment chamber; and heating the substrate to remove etchant reaction products from the substrate. In a second portion of the vapor-etch cyclic process, the method continues with transferring the substrate from the post-etch heat treatment chamber to the vapor-phase chamber; exposing the substrate to the selected etchants in the vapor-phase chamber; transferring the substrate to the post-etch heat treatment chamber; and heating the substrate to remove additional etchant reaction products from the substrate. Apparatuses for performing the method and additional methods are also disclosed.

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

Abstract: Some embodiments include an integrated assembly having a region of first semiconductor material. The region has an upper surface along a cross-section. The upper surface has a flat-topped peak and a concavity adjacent the flat-topped peak. A pillar of second semiconductor material is over the region and directly against the region. The pillar extends vertically from the upper surface. Some embodiments include a method of forming an integrated assembly. A construction is formed to have a semiconductor region, and to have an insulative region extending over the semiconductor region and alongside the semiconductor region. A combination of three etches is utilized to expose an upper surface of the semiconductor region and to modify the upper surface of the semiconductor region to form said upper surface to include, along a cross-section, a flat-topped peak portion and an adjacent concavity portion.

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

Abstract: Some embodiments include an integrated assembly having a region of first semiconductor material. The region has an upper surface along a cross-section. The upper surface has a flat-topped peak and a concavity adjacent the flat-topped peak. A pillar of second semiconductor material is over the region and directly against the region. The pillar extends vertically from the upper surface. Some embodiments include a method of forming an integrated assembly. A construction is formed to have a semiconductor region, and to have an insulative region extending over the semiconductor region and alongside the semiconductor region. A combination of three etches is utilized to expose an upper surface of the semiconductor region and to modify the upper surface of the semiconductor region to form said upper surface to include, along a cross-section, a flat-topped peak portion and an adjacent concavity portion.