Patents by Inventor Sanjeev Sapra

Sanjeev Sapra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190267232
    Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.
    Type: Application
    Filed: February 26, 2018
    Publication date: August 29, 2019
    Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel
  • Patent number: 10374033
    Abstract: Some embodiments include an integrated assembly having a region of first semiconductor material. The region has an upper surface along a cross-section. The upper surface has a flat-topped peak and a concavity adjacent the flat-topped peak. A pillar of second semiconductor material is over the region and directly against the region. The pillar extends vertically from the upper surface. Some embodiments include a method of forming an integrated assembly. A construction is formed to have a semiconductor region, and to have an insulative region extending over the semiconductor region and alongside the semiconductor region. A combination of three etches is utilized to expose an upper surface of the semiconductor region and to modify the upper surface of the semiconductor region to form said upper surface to include, along a cross-section, a flat-topped peak portion and an adjacent concavity portion.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: August 6, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Pranav P. Sharma, Vinay Nair, Sanjeev Sapra
  • Publication number: 20190067028
    Abstract: Various embodiments comprise methods of selectively etching oxides over nitrides in a vapor-etch cyclic process. In one embodiment, the method includes, in a first portion of the vapor-etch cyclic process, exposing a substrate having oxide features and nitride features formed thereon to selected etchants in a vapor-phase chamber; transferring the substrate to a post-etch heat treatment chamber; and heating the substrate to remove etchant reaction products from the substrate. In a second portion of the vapor-etch cyclic process, the method continues with transferring the substrate from the post-etch heat treatment chamber to the vapor-phase chamber; exposing the substrate to the selected etchants in the vapor-phase chamber; transferring the substrate to the post-etch heat treatment chamber; and heating the substrate to remove additional etchant reaction products from the substrate. Apparatuses for performing the method and additional methods are also disclosed.
    Type: Application
    Filed: August 25, 2017
    Publication date: February 28, 2019
    Inventors: Andrew L. Li, Prashant Raghu, Sanjeev Sapra, Rita J. Klein, Sanh D. Tang, Sourabh Dhir
  • Patent number: 9653307
    Abstract: A surface modification composition comprising a silylation agent comprising a silyl acetamide, a silylation catalyst comprising a perfluoro acid anhydride, an amine-based complexing agent, and an organic solvent. Methods of modifying a silicon-based material and methods of forming high aspect ratio structures on a substrate are also disclosed.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 16, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Jerome A. Imonigie, Ian C. Laboriante, Michael T. Andreas, Sanjeev Sapra, Prashant Raghu
  • Patent number: 9397210
    Abstract: A memory array has first and second memory cells over a semiconductor and an isolation region extending into the semiconductor. The isolation region includes an air gap between charge-storage structures of the first and second memory cells and a thickness of dielectric over the air gap and contained between the first and second memory cells.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: July 19, 2016
    Assignee: Micron Technology, Inc.
    Inventors: James Mathew, Gordon Haller, Ronald A. Weimer, John Hopkins, Vinayak K. Shamanna, Sanjeev Sapra
  • Publication number: 20160013191
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Patent number: 9230966
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: January 5, 2016
    Assignee: NANYA TECHNOLOGY CORP.
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Publication number: 20150340320
    Abstract: A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Sanjeev Sapra, Cheng-Shun Chen, Hung-Ming Tsai, Sheng-Wei Yang
  • Publication number: 20150294971
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 15, 2015
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Patent number: 9117759
    Abstract: A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: August 25, 2015
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sanjeev Sapra, Cheng-Shun Chen, Hung-Ming Tsai, Sheng-Wei Yang
  • Patent number: 8766347
    Abstract: Some embodiments include capacitors. The capacitors may include container-shaped storage node structures that have, along a cross-section, a pair of upwardly-extending sidewalls. Individual sidewalls may have a narrower segment over a wider segment. Capacitor dielectric material and capacitor electrode material may be along the narrower and wider segments of the sidewalls. Some embodiments include methods of forming capacitors in which an initial container-shaped storage node structure is formed to have a pair of upwardly-extending sidewalls along a cross-section, with the sidewalls being of thickness that is substantially constant or increasing from a base to a top of the initial structure. The initial structure is then converted into a modified storage node structure by reducing thicknesses of upper segments of the sidewalls while leaving thicknesses of lower segments of the sidewalls substantially unchanged.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: July 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Duane M. Goodner, Sanjeev Sapra, Darwin Franseda Fan
  • Publication number: 20140027832
    Abstract: A memory array has first and second memory cells over a semiconductor and an isolation region extending into the semiconductor. The isolation region includes an air gap between charge-storage structures of the first and second memory cells and a thickness of dielectric over the air gap and contained between the first and second memory cells.
    Type: Application
    Filed: October 2, 2013
    Publication date: January 30, 2014
    Applicant: Micron Technology, Inc.
    Inventors: James Mathew, Gordon Haller, Ronald A. Weimer, John Hopkins, Vinayak K. Shamanna, Sanjeev Sapra
  • Patent number: 8586483
    Abstract: A method of removing a metal nitride material is disclosed. The method comprises forming a semiconductor device structure comprising an exposed metal material and an exposed metal nitride material. The semiconductor device structure is subjected to a solution comprising water, ozone, and at least one additive to remove the exposed metal nitride material at a substantially greater rate than the exposed metal material. Resulting semiconductor device structures are also disclosed, as are compositions used to form the semiconductor device structures.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: November 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Sanjeev Sapra, Janos Fucsko
  • Patent number: 8569130
    Abstract: Methods of forming air gaps in memory arrays and memory arrays with air gaps thus formed are disclosed. One such method may include forming an isolation region, having a first dielectric, through a charge-storage structure that is over a semiconductor, the isolation region extending into the semiconductor; forming a second dielectric over the isolation region and charge-storage structure; and forming an air gap in the isolation region so that the air gap passes through the charge-storage structure and so that a thickness of the first dielectric is between the air gap and the second dielectric.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: October 29, 2013
    Assignee: Micron Technology, Inc.
    Inventors: James Mathew, Gordon Haller, Ronald A. Weimer, John Hopkins, Vinayak K. Shamanna, Sanjeev Sapra
  • Patent number: 8546016
    Abstract: A method for cleaning a semiconductor structure includes subjecting a semiconductor structure to an aqueous solution including at least one fluorine compound, and at least one strong acid, the aqueous solution having a pH of less than 1. In one embodiment, the aqueous solution includes water, hydrochloric acid, and hydrofluoric acid at a volumetric ratio of water to hydrochloric acid to hydrofluoric acid of 1000:32.5:1. The aqueous solution may be used to form a contact plug that has better contact resistance and improved critical dimension bias than conventional cleaning solutions.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: October 1, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Sanjeev Sapra, Niraj Rana
  • Publication number: 20130037919
    Abstract: A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 14, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sanjeev Sapra, Cheng-Shun Chen, Hung-Ming Tsai, Sheng-Wei Yang
  • Publication number: 20130026600
    Abstract: Methods of forming air gaps in memory arrays and memory arrays with air gaps thus formed are disclosed. One such method may include forming an isolation region, having a first dielectric, through a charge-storage structure that is over a semiconductor, the isolation region extending into the semiconductor; forming a second dielectric over the isolation region and charge-storage structure; and forming an air gap in the isolation region so that the air gap passes through the charge-storage structure and so that a thickness of the first dielectric is between the air gap and the second dielectric.
    Type: Application
    Filed: July 28, 2011
    Publication date: January 31, 2013
    Inventors: James Matthew, Gordon Haller, Ronald A. Weimer, John Hopkins, Vinayak K. Shamanna, Sanjeev Sapra
  • Publication number: 20130009310
    Abstract: A method of removing a metal nitride material is disclosed. The method comprises forming a semiconductor device structure comprising an exposed metal material and an exposed metal nitride material. The semiconductor device structure is subjected to a solution comprising water, ozone, and at least one additive to remove the exposed metal nitride material at a substantially greater rate than the exposed metal material. Resulting semiconductor device structures are also disclosed, as are compositions used to form the semiconductor device structures.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 10, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sanjeev Sapra, Janos Fucsko
  • Publication number: 20120326275
    Abstract: Some embodiments include capacitors. The capacitors may include container-shaped storage node structures that have, along a cross-section, a pair of upwardly-extending sidewalls. Individual sidewalls may have a narrower segment over a wider segment. Capacitor dielectric material and capacitor electrode material may be along the narrower and wider segments of the sidewalls. Some embodiments include methods of forming capacitors in which an initial container-shaped storage node structure is formed to have a pair of upwardly-extending sidewalls along a cross-section, with the sidewalls being of thickness that is substantially constant or increasing from a base to a top of the initial structure. The initial structure is then converted into a modified storage node structure by reducing thicknesses of upper segments of the sidewalls while leaving thicknesses of lower segments of the sidewalls substantially unchanged.
    Type: Application
    Filed: September 7, 2012
    Publication date: December 27, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Duane M. Goodner, Sanjeev Sapra, Darwin Franseda Fan
  • Patent number: 8283236
    Abstract: Some embodiments include capacitors. The capacitors may include container-shaped storage node structures that have, along a cross-section, a pair of upwardly-extending sidewalls. Individual sidewalls may have a narrower segment over a wider segment. Capacitor dielectric material and capacitor electrode material may be along the narrower and wider segments of the sidewalls. Some embodiments include methods of forming capacitors in which an initial container-shaped storage node structure is formed to have a pair of upwardly-extending sidewalls along a cross-section, with the sidewalls being of thickness that is substantially constant or increasing from a base to a top of the initial structure. The initial structure is then converted into a modified storage node structure by reducing thicknesses of upper segments of the sidewalls while leaving thicknesses of lower segments of the sidewalls substantially unchanged.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: October 9, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Duane M. Goodner, Sanjeev Sapra, Darwin Franseda Fan