Patents by Inventor Sanjeev Trika

Sanjeev Trika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200363998
    Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to maintain a respective lookup table for each of two or more persistent storage devices in a persistent memory outside of the two or more persistent storage devices with a first indirection granularity that is smaller than a second indirection granularity of each of the two or more persistent storage devices, buffer write requests to the two or more persistent storage devices in the persistent memory in accordance with the respective lookup tables, and perform a sequential write from the persistent memory to a particular device of the two or more persistent storage devices when a portion of the buffer that corresponds to the particular device has an amount of data to write that corresponds to the second indirection granularity. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Applicant: Intel Corporation
    Inventors: Benjamin Walker, Sanjeev Trika, Kapil Karkra, James R. Harris, Steven C. Miller, Bishwajit Dutta
  • Publication number: 20200363997
    Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to control access to a primary persistent storage with a first type of media and a nonvolatile memory buffer with a second type of media that is different from the first type of media, store metadata for incoming write data in the nonvolatile memory buffer, store other data for the incoming write data in the primary persistent storage, and provide both runtime and power-fail write atomicity for the incoming write data. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 19, 2020
    Applicant: Intel Corporation
    Inventors: Peng Li, Jawad Khan, Jackson Ellis, Sanjeev Trika
  • Patent number: 10719462
    Abstract: Technologies for data processing or computation on data storage devices include a data storage controller. The data storage controller is configured to receive a data request from a compute device, determine an input data range specified by the compute device to be processed in the data storage device without sending data located at the input data to the compute device, read input data from the input data range, perform a data operation on the input data specified by the compute device to generate output data, and write the output data to an output data range specified by the compute device.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventor: Sanjeev Trika
  • Publication number: 20200218474
    Abstract: In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.
    Type: Application
    Filed: December 3, 2019
    Publication date: July 9, 2020
    Inventors: Jawad Basit Khan, Peng Li, Sanjeev Trika
  • Publication number: 20200210207
    Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to manage a persistent storage media, provide a host with an indication of a time for the host to initiate a subsequent wake-up for data management of the persistent storage media, and perform data management of the persistent storage media in response to a host-initiated wake-up from a zero power state. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Applicant: Intel Corporation
    Inventor: Sanjeev Trika
  • Patent number: 10678768
    Abstract: Systems, apparatuses and methods may store data. A system may include a processor communicatively coupled to an indexing structure and a datastore log separate from the indexing structure. The indexing structure may store key data corresponding to a key of a key-value pair and an address for the key-value pair. The datastore log may store the key-value pair at the address in a logical band of a plurality of independent logical bands. In addition, the system may include a memory device coupled to the processor. The memory device may include instructions, which when executed by the processor, may cause the system to execute an operation involving the key-value pair.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Peng Li, Sanjeev Trika
  • Patent number: 10496371
    Abstract: One embodiment provides a storage device. The storage device includes a storage I/O (input/output) logic and a storage device controller. The storage I/O logic is to couple the storage device to a host device, the storage I/O logic to receive a sort-merge command the host device. The a storage device controller is to identify a level N SSTable (sorted string table) file, a corresponding level N index file, a first level N+1 SSTable file and a corresponding first level N+1 index file, in response to the sort-merge command to be received from the host device. The storage device controller is further to perform a sort-merge of the level N SSTable file and the first level N+1 SSTable file to produce a first level N+1 output SSTable file and a first level N+1 output SSTable index file. The level N SSTable file includes at least one level N key-value (KV) pair. The level N+1 SSTable file includes at least one level N+1 key-value (KV) pair.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev Trika
  • Patent number: 10496335
    Abstract: In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Jawad Basit Khan, Peng Li, Sanjeev Trika
  • Publication number: 20190303284
    Abstract: An embodiment of a mass storage apparatus may include first non-volatile media, second non-volatile media which provides a relatively larger write granularity as compared to the first non-volatile media, and logic communicatively coupled to the first and second non-volatile media to direct an access request to one of the first non-volatile media and the second non-volatile media based on an indication from an operating system. An embodiment of a host computing apparatus may include a processor, memory communicatively coupled to the processor, and logic communicatively coupled to the processor to provide an indication for a file system-related access request to a mass storage device based on a granularity size for the file system-related access request. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Applicant: Intel Corporation
    Inventors: Sanjeev Trika, Jawad Khan, Peng Li, Myron Loewen
  • Publication number: 20190258504
    Abstract: Techniques and mechanisms for communicating compiled software instructions via a network, wherein the compiled instructions are to execute a kernel process of a network device. In an embodiment, a first node of a network receives a kernel source code from a second node of the network. The first node compiles the kernel source code to generate a kernel binary code, which is provided to the second node. Based on the kernel binary code being communicated to the second node, a software developer is able to perform a simulation that facilitates the development of an application binary code. The first node subsequently receives the application binary and an indication that the application binary is to be executed with the kernel binary at the first node. In some embodiments, the first node executes an application process and a kernel process to provide an application offload resource for another network node.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 22, 2019
    Applicant: Intel Corporation
    Inventors: Sanjeev Trika, Bishwajit Dutta
  • Publication number: 20190243545
    Abstract: An apparatus and method for performing search and replace operations at a storage controller of a storage device are disclosed. The storage controller can receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in a memory and can locally search the data in the memory for the data pattern according to the parameters without transferring the data to a processor to perform the search. The parameters can include, but are not limited to, the data pattern or template to be searched, a data pattern length, a bit-mask, a logical block address (LBA) range, a byte offset, and an alignment parameter. Verdict bits can be provided to indicate data chunks in the memory that match the data pattern. Flags may define potential outputs to provide after searching, such as location and number of matches.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Applicant: Intel Corporation
    Inventors: Sanjeev Trika, Kshitij Doshi
  • Patent number: 10325108
    Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Xiaoning Li, Ravi L. Sahita, Benjamin W. Boyer, Sanjeev Trika, Adrian Pearson
  • Patent number: 10296250
    Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: May 21, 2019
    Assignee: Intel Corporation
    Inventors: Benjamin L. Walker, August A. Camber, Jonathan Bryan Stern, Sanjeev Trika, Richard P. Mangold, Jawad Basit Khan, Anand Ramalingam
  • Publication number: 20190146913
    Abstract: An embodiment of a package apparatus may include technology to control a first persistent storage media of the electronic storage, control a second persistent storage media of the electronic storage, wherein the second persistent storage media includes one or more of a faster access time and a smaller granularity access as compared to the first persistent storage media, store a logical-to-physical table in the second persistent storage media, and, in response to a data copy command, update an entry in the logical-to-physical table corresponding to a destination logical block address for the data copy command to point to a same physical address as a source logical block address for the data copy command. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 16, 2019
    Inventor: Sanjeev Trika
  • Publication number: 20190129876
    Abstract: According to various aspects, methods and devices configured for data storage management, including managing one or more queues each comprising a plurality of pending input/outputs (I/Os) for writing to or reading from a data storage arrangement, each pending I/O having a respective priority according to an I/O priority scheme; receiving a new I/O; assigning a priority to the new I/O according to the I/O priority scheme; selecting a queue from the one or more queues and modifying the queue to add the new I/O, wherein the queue's selection and the new I/O's position in the queue is based on its assigned priority; and executing the I/Os of the one or more queues as modified.
    Type: Application
    Filed: October 26, 2017
    Publication date: May 2, 2019
    Inventor: Sanjeev TRIKA
  • Patent number: 10261688
    Abstract: An apparatus and method for performing search and replace operations at a storage controller of a storage device are disclosed. The storage controller can receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in a memory of the apparatus. The storage controller can locally search the data in the memory for the data pattern according to the parameters without transferring the data to a processor to perform the search. The parameters can include, but are not limited to, the data pattern or template to be searched, a data pattern length, a bit-mask, a logical block address (LBA) range, a byte offset, and an alignment parameter. Verdict bits can be provided to indicate data chunks in the memory that match the data pattern. Flags may define potential outputs to provide after searching, such as location and number of matches.
    Type: Grant
    Filed: April 2, 2016
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Sanjeev Trika, Kshitij Doshi
  • Publication number: 20190042114
    Abstract: An embodiment of a semiconductor apparatus may include technology to selectively determine a set of data for background refresh based at least in part on host-provided information, and refresh the determined set of data on a persistent storage media as a background operation. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 28, 2018
    Publication date: February 7, 2019
    Inventors: Michael Mesnier, Kapil Karkra, Piotr Wysocki, Jonathan Hughes, Brennan Watt, Sanjeev Trika, Anand Ramalingam
  • Publication number: 20190042441
    Abstract: Systems, apparatuses and methods may provide for technology to automatically identify a plurality of non-volatile memory locations associated with a file in response to a close operation with respect to the file and automatically conduct a prefetch from one or more of the plurality of non-volatile memory locations that have been most recently accessed and do not reference cached file segments. The prefetch may be conducted in response to an open operation with respect to the file and on a per-file segment basis.
    Type: Application
    Filed: June 28, 2018
    Publication date: February 7, 2019
    Inventors: Scott Burridge, William Chiu, Jawad Khan, Sanjeev Trika
  • Publication number: 20190042098
    Abstract: An embodiment of a semiconductor apparatus may include technology to define a region for a backed-up portion of a volatile memory, and designate the region as a part of a nonvolatile memory. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 8, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Peng Li, Sanjeev Trika
  • Publication number: 20190042501
    Abstract: Technologies for data processing or computation on data storage devices include a data storage controller. The data storage controller is configured to receive a data request from a compute device, determine an input data range specified by the compute device to be processed in the data storage device without sending data located at the input data to the compute device, read input data from the input data range, perform a data operation on the input data specified by the compute device to generate output data, and write the output data to an output data range specified by the compute device.
    Type: Application
    Filed: September 25, 2018
    Publication date: February 7, 2019
    Inventor: Sanjeev Trika