Patents by Inventor Sanjeev Trika

Sanjeev Trika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10296250
    Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: May 21, 2019
    Assignee: Intel Corporation
    Inventors: Benjamin L. Walker, August A. Camber, Jonathan Bryan Stern, Sanjeev Trika, Richard P. Mangold, Jawad Basit Khan, Anand Ramalingam
  • Publication number: 20190146913
    Abstract: An embodiment of a package apparatus may include technology to control a first persistent storage media of the electronic storage, control a second persistent storage media of the electronic storage, wherein the second persistent storage media includes one or more of a faster access time and a smaller granularity access as compared to the first persistent storage media, store a logical-to-physical table in the second persistent storage media, and, in response to a data copy command, update an entry in the logical-to-physical table corresponding to a destination logical block address for the data copy command to point to a same physical address as a source logical block address for the data copy command. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 16, 2019
    Inventor: Sanjeev Trika
  • Publication number: 20190129876
    Abstract: According to various aspects, methods and devices configured for data storage management, including managing one or more queues each comprising a plurality of pending input/outputs (I/Os) for writing to or reading from a data storage arrangement, each pending I/O having a respective priority according to an I/O priority scheme; receiving a new I/O; assigning a priority to the new I/O according to the I/O priority scheme; selecting a queue from the one or more queues and modifying the queue to add the new I/O, wherein the queue's selection and the new I/O's position in the queue is based on its assigned priority; and executing the I/Os of the one or more queues as modified.
    Type: Application
    Filed: October 26, 2017
    Publication date: May 2, 2019
    Inventor: Sanjeev TRIKA
  • Patent number: 10261688
    Abstract: An apparatus and method for performing search and replace operations at a storage controller of a storage device are disclosed. The storage controller can receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in a memory of the apparatus. The storage controller can locally search the data in the memory for the data pattern according to the parameters without transferring the data to a processor to perform the search. The parameters can include, but are not limited to, the data pattern or template to be searched, a data pattern length, a bit-mask, a logical block address (LBA) range, a byte offset, and an alignment parameter. Verdict bits can be provided to indicate data chunks in the memory that match the data pattern. Flags may define potential outputs to provide after searching, such as location and number of matches.
    Type: Grant
    Filed: April 2, 2016
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Sanjeev Trika, Kshitij Doshi
  • Publication number: 20190042113
    Abstract: An embodiment of a semiconductor apparatus may include technology to determine a persistent region and a non-persistent region of a volatile media based on an amount of power available from one or more backup power sources, and periodically backup only the non-persistent region of the volatile media to a non-volatile media. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 29, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Peng Li, Sanjeev Trika, Jawad Khan, Myron Loewen
  • Publication number: 20190042232
    Abstract: Technologies for automatic compilation of storage offloads include a compute device. The compute device further includes a compiler logic unit to analyze a source code of an application, identify a section of the source code that includes operations to be offloaded to a data storage device on a target compute device, extract, in response to an identification of the section that includes operations to be offloaded, the section of the source code, and compile the section of the source code extracted as an offload function.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 7, 2019
    Inventor: Sanjeev Trika
  • Publication number: 20190042114
    Abstract: An embodiment of a semiconductor apparatus may include technology to selectively determine a set of data for background refresh based at least in part on host-provided information, and refresh the determined set of data on a persistent storage media as a background operation. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 28, 2018
    Publication date: February 7, 2019
    Inventors: Michael Mesnier, Kapil Karkra, Piotr Wysocki, Jonathan Hughes, Brennan Watt, Sanjeev Trika, Anand Ramalingam
  • Publication number: 20190042441
    Abstract: Systems, apparatuses and methods may provide for technology to automatically identify a plurality of non-volatile memory locations associated with a file in response to a close operation with respect to the file and automatically conduct a prefetch from one or more of the plurality of non-volatile memory locations that have been most recently accessed and do not reference cached file segments. The prefetch may be conducted in response to an open operation with respect to the file and on a per-file segment basis.
    Type: Application
    Filed: June 28, 2018
    Publication date: February 7, 2019
    Inventors: Scott Burridge, William Chiu, Jawad Khan, Sanjeev Trika
  • Publication number: 20190042098
    Abstract: An embodiment of a semiconductor apparatus may include technology to define a region for a backed-up portion of a volatile memory, and designate the region as a part of a nonvolatile memory. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 8, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Peng Li, Sanjeev Trika
  • Publication number: 20190042501
    Abstract: Technologies for data processing or computation on data storage devices include a data storage controller. The data storage controller is configured to receive a data request from a compute device, determine an input data range specified by the compute device to be processed in the data storage device without sending data located at the input data to the compute device, read input data from the input data range, perform a data operation on the input data specified by the compute device to generate output data, and write the output data to an output data range specified by the compute device.
    Type: Application
    Filed: September 25, 2018
    Publication date: February 7, 2019
    Inventor: Sanjeev Trika
  • Publication number: 20190042142
    Abstract: An embodiment of a semiconductor apparatus may include technology to monitor one or more external performance indicators related to a workload impact on a persistent storage media, monitor one or more internal performance indicators for the persistent storage media, and adjust the workload based on the external performance indicators, the internal performance indicators, and priority information related to the workload. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: December 29, 2017
    Publication date: February 7, 2019
    Inventors: Jason Casmira, Jawad Khan, Ambika Krishnamoorthy, Sanjeev Trika
  • Publication number: 20190042143
    Abstract: Technologies for logging and visualizing trace capture data in a data storage subsystem (e.g., storage application layers and data storage devices of a compute device) are disclosed herein. One or more storage events in the data storage subsystem are captured for a specified time period. Statistics are determined from the captured storage events. A visualization of the storage events and statistics for the specified time period is generated.
    Type: Application
    Filed: September 26, 2018
    Publication date: February 7, 2019
    Inventor: Sanjeev Trika
  • Publication number: 20190004768
    Abstract: One embodiment provides a storage device. The storage device includes a storage I/O (input/output) logic and a storage device controller. The storage I/O logic is to couple the storage device to a host device, the storage I/O logic to receive a sort-merge command the host device. The a storage device controller is to identify a level N SSTable (sorted string table) file, a corresponding level N index file, a first level N+1 SSTable file and a corresponding first level N+1 index file, in response to the sort-merge command to be received from the host device. The storage device controller is further to perform a sort-merge of the level N SSTable file and the first level N+1 SSTable file to produce a first level N+1 output SSTable file and a first level N+1 output SSTable index file. The level N SSTable file includes at least one level N key-value (KV) pair. The level N+1 SSTable file includes at least one level N+1 key-value (KV) pair.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Applicant: Intel Corporation
    Inventors: Peng LI, Jawad B. KHAN, Sanjeev TRIKA
  • Publication number: 20190004737
    Abstract: In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Applicant: INTEL CORPORATION
    Inventors: Jawad Basit Khan, Peng Li, Sanjeev Trika
  • Publication number: 20180189508
    Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Xiaoning Li, Ravi L. Sahita, Benjamin W. Boyer, Sanjeev Trika, Adrian Pearson
  • Publication number: 20170357462
    Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.
    Type: Application
    Filed: June 8, 2016
    Publication date: December 14, 2017
    Applicant: Intel Corporation
    Inventors: Benjamin L. Walker, August A. Camber, Jonathan Bryan Stern, Sanjeev Trika, Richard P. Mangold, Jawad Basit Khan, Anand Ramalingam
  • Publication number: 20170285949
    Abstract: Technology for an apparatus is described. The apparatus can include a memory and a storage controller. The storage controller can be configured to receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in the memory. The storage controller can be configured to search the data stored in the memory for the data pattern according to the one or more parameters included in the search command. The storage controller can be configured to locally search the data in the memory for the data pattern without transferring the data to a processor to perform the search.
    Type: Application
    Filed: April 2, 2016
    Publication date: October 5, 2017
    Applicant: Intel Corporation
    Inventors: Sanjeev Trika, Kshitij Doshi
  • Patent number: 9530461
    Abstract: Techniques to utilize a very low power state with a memory subsystem that includes one or more non-volatile memory devices and a volatile memory system. A memory controller is coupled with the one or more non-volatile memory devices and the volatile memory system. The memory controller comprising at least an embedded control agent and memory locations to store state information. The memory controller to selectively enable and disable the one or more non-volatile memory devices. The memory controller transfers the state information to the volatile memory system prior to entering a low power state. Control circuitry is coupled with the memory controller. The control circuitry to selectively enable and disable operation of the memory controller.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: December 27, 2016
    Assignee: Intel Corporation
    Inventors: Jason B. Akers, Knut S. Grimsrud, Robert J. Royer, Jr., Richard P. Mangold, Sanjeev Trika
  • Publication number: 20140003145
    Abstract: Techniques to utilize a very low power state with a memory subsystem that includes one or more non-volatile memory devices and a volatile memory system. A memory controller is coupled with the one or more non-volatile memory devices and the volatile memory system. The memory controller comprising at least an embedded control agent and memory locations to store state information. The memory controller to selectively enable and disable the one or more non-volatile memory devices. The memory controller transfers the state information to the volatile memory system prior to entering a low power state. Control circuitry is coupled with the memory controller. The control circuitry to selectively enable and disable operation of the memory controller.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: JASON B. AKERS, Knut S. Grimsrud, Robert J. Royer, JR., Richard P. Mangold, Sanjeev Trika
  • Publication number: 20070233947
    Abstract: In one embodiment, the present invention includes a method for maintaining a sequence of writes into a disk cache, where the writes correspond to disk write requests stored in the disk cache, and ordering cache writes from the disk cache to a disk drive according to the sequence of writes. In this way, write ordering from an operating system to a disk subsystem is maintained. Other embodiments are described and claimed.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 4, 2007
    Inventors: Richard Coulson, Sanjeev Trika, Jeanna Matthews, Robert Faber