Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer washed off.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.

Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a galvanic laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.

Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.

Abstract: Embodiments of the present invention generally relate to a method and apparatus for plasma etching substrates and, more specifically, to a method and apparatus with protection for edges, sides and backs of the substrates being processed. Embodiments of the present invention provide an edge protection plate with an aperture smaller in size than a substrate being processed, wherein the edge protection plate may be positioned in close proximity to the substrate in a plasma chamber. The edge protection plate overlaps edges and/or sides on the substrate to provide protection to reflective coatings on the edge, sides, and back of the substrate.

Abstract: Embodiments described herein provide apparatus and methods of etching a substrate using an ion etch chamber having a movable aperture. The ion etch chamber has a chamber body enclosing a processing region, a substrate support disposed in the processing region and having a substrate receiving surface, a plasma source disposed at a wall of the chamber body facing the substrate receiving surface, an ion-radical shield disposed between the plasma source and the substrate receiving surface, and a movable aperture member between the ion-radical shield and the substrate receiving surface. The movable aperture member is actuated by a lift assembly comprising a lift ring and lift supports from the lift ring to the aperture member. The ion-radical shield is supported by shield supports disposed through the aperture member. The aperture size, shape, and/or central axis location may be changed using inserts.

Abstract: Embodiments of the present invention relate to a plasma chamber having a coil assembly which improves plasma uniformity and improves power coupling to the plasma. One embodiment provides a plasma chamber. The plasma chamber includes a chamber body having sidewalls and a lid, wherein the chamber body defines a processing volume. The plasma chamber further includes a coil assembly disposed over the lid configured to generate inductively coupled plasma within the processing volume, wherein the coil assembly comprises two or more horizontal coils arranged in a common horizontal plane.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a femtosecond-based laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract: The present invention generally relates to apparatus and methods for plating conductive materials on a substrate. One embodiment of the present invention provides an apparatus for plating a conductive material on a substrate. The apparatus comprises a fluid basin configured to retain an electrolyte, a contact ring configured to support the substrate and contact the substrate electrically, and an anode assembly disposed in the fluid basin, wherein the anode assembly comprises a plurality of anode elements arranged in rows.

Abstract: The present invention generally relates to apparatus and methods for plating conductive materials on a substrate. One embodiment of the present invention provides an apparatus for plating a conductive material on a substrate. The apparatus comprises a fluid basin configured to retain an electrolyte, a contact ring configured to support the substrate and contact the substrate electrically, and an anode assembly disposed in the fluid basin, wherein the anode assembly comprises a plurality of anode elements arranged in rows.

Abstract: Embodiments of the present invention relate to method and apparatus for providing processing gases to a process chamber with improved plasma dissociation efficiency. One embodiment of the present invention provides a baffle nozzle assembly comprising an outer body defining an extension volume connected to a processing chamber. A processing gas is flown to the processing chamber through the extension volume which is exposed to power source for plasma generation.

Abstract: A method and apparatus for plating a metal onto a substrate. One embodiment of the invention provides an apparatus for electrochemically plating a substrate. The apparatus comprises a fluid basin configured to retain a plating solution therein, an anode assembly disposed in the fluid basin, a substrate support member configured to support the substrate and contact the substrate electrically, and an encased auxiliary electrode assembly disposed in the fluid basin. The encased auxiliary electrode assembly generally comprises an auxiliary electrode disposed in a protective tube.

Abstract: Embodiments of the invention relate to a substrate etching system and process. In one embodiment, a method may include depositing material on the substrate during a deposition process, etching a first layer of the substrate during a first etch process, and etching a second layer of the substrate during a second etch process, wherein a first bias power is applied to the substrate during the first process, and wherein a second bias power is applied to the substrate during the second etch process. In another embodiment, a system may include a gas delivery system containing a first gas panel for supplying a first gas to a chamber, a second gas panel for supplying a second gas to the chamber, and a plurality of flow controllers for directing the gases to the chamber to facilitate rapid gas transitioning between the gases to and from the chamber and the panels.

Abstract: Embodiments of the invention may generally provide a small volume electrochemical plating cell. The plating cell generally includes a fluid basin configured to contain a plating solution therein, the fluid basin having a substantially horizontal weir. The cell further includes an anode positioned in a lower portion of the fluid basin, the anode having a plurality of parallel channels formed therethrough, and a base member configured to receive the anode, the base member having a plurality of groves formed into an anode receiving surface, each of the plurality of grooves terminating into an annular drain channel. A membrane support assembly configured to position a membrane immediately above the anode in a substantially planar orientation with respect to the anode surface is provided, the membrane support assembly having a plurality of channels and bores formed therein.

Abstract: The present invention generally relates to apparatus and methods for plating conductive materials on a substrate. One embodiment of the present invention provides an apparatus for plating a conductive material on a substrate. The apparatus comprises a fluid basin configured to retain an electrolyte, a contact ring configured to support the substrate and contact the substrate electrically, and an anode assembly disposed in the fluid basin, wherein the anode assembly comprises a plurality of anode elements arranged in rows.