Patents by Inventor Saravjeet Singh

Saravjeet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140120698
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Publication number: 20140120697
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.
    Type: Application
    Filed: January 3, 2014
    Publication date: May 1, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Patent number: 8703581
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer washed off.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: April 22, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Publication number: 20140065797
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Inventors: Madhava Rao Yalamanchili, Wei-Sheng Lei, Brad Eaton, Saravjeet Singh, Ajay Kumar, Banqiu Wu
  • Patent number: 8652940
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: February 18, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Patent number: 8642448
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a femtosecond-based laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: February 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Publication number: 20140015109
    Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.
    Type: Application
    Filed: June 14, 2013
    Publication date: January 16, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Saravjeet Singh, Todd Egan, Ajay Kumar, Seshadri Ramaswami
  • Publication number: 20140017881
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 16, 2014
    Inventors: Brad EATON, Saravjeet SINGH, Wei-Sheng LEI, Madhava Rao YALAMANCHILI, Tong LIU, Ajay KUMAR
  • Publication number: 20140017880
    Abstract: Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 16, 2014
    Inventors: Wei-Sheng LEI, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Publication number: 20140011337
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 9, 2014
    Inventors: James M. Holden, Wei-Sheng Lei, Brad Eaton, Todd Egan, Saravjeet Singh
  • Publication number: 20140011338
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 9, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Patent number: 8598016
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: December 3, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Madhava Rao Yalamanchili, Wei-Sheng Lei, Brad Eaton, Saravjeet Singh, Ajay Kumar, Banqiu Wu
  • Publication number: 20130299088
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: Wei-Sheng Lei, Madhava Rao Yalamanchili, Brad Eaton, Saravjeet Singh, Ajay Kumar
  • Patent number: 8557682
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: October 15, 2013
    Assignee: Applied Materials, Inc.
    Inventors: James M. Holden, Wei-Sheng Lei, Brad Eaton, Todd Egan, Saravjeet Singh
  • Patent number: 8557683
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: October 15, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Publication number: 20130267076
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: March 27, 2013
    Publication date: October 10, 2013
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Patent number: 8507363
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 13, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Madhava Rao Yalamanchili, Brad Eaton, Saravjeet Singh, Ajay Kumar
  • Publication number: 20130017668
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a split-beam laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: July 11, 2011
    Publication date: January 17, 2013
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, Aparna Iyer
  • Publication number: 20130005152
    Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).
    Type: Application
    Filed: May 25, 2012
    Publication date: January 3, 2013
    Applicant: Applied Materials, Inc.
    Inventors: JIVKO DINEV, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20130000731
    Abstract: Embodiments of the invention relate to a gas delivery system. The gas delivery system includes a fast gas exchange module in fluid communication with one or more gas panels and a process chamber. The fast gas exchange module has first and second sets of flow controllers and each of first and second sets of flow controllers has multiple flow controllers. The flow controller is configured such that each of the flow controllers in the first and second sets of the flow controllers is independently operated to selectively open to divert gas to the process chamber or an exhaust. The first and second sets of flow controllers are operated for synchronized switching of gases in a pre-determined timed sequence of flow controller actuation. The invention enables fast switch of resultant gas flow in the process chamber while having individual flow controller operated at lower switching speed to provide longer service life.
    Type: Application
    Filed: April 25, 2012
    Publication date: January 3, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Saravjeet SINGH, Roy C. Nangoy