Abstract: Examples of this description provide for a method. In some examples, the method includes determining, via a circuit, an estimated value of harmonic coupling in a transmitted signal via a feedback signal path that receives the transmitted signal and performing pre-compensation for the harmonic coupling based on the estimated value, the pre-compensation performed in the circuit.

Abstract: A TX-TX pre-compensation system that estimates unwanted coupling in a victim transmit chain caused by an aggressor transmit chain and injects a pre-compensation signal to cancel out the estimated coupling. In some embodiments, a signal measurement module estimates the amplitude, phase, and envelope delay of the coupling and an isolation pre-compensation module generates the pre-compensation signal based on the estimated amplitude, the estimated phase, the estimated envelope delay, and the difference between the carrier frequencies of the transmit chains. Since the phase of the coupling may be affected by the carrier frequency of the transmit chains, in some embodiments the phase of the pre-compensation signal is adjusted in response to a change in carrier frequency. Since the amplitude of the coupling may be affected by attenuator gain settings, in some embodiments the amplitude of the pre-compensation signal may be adjusted in response to a change in attenuator gain setting.

Abstract: The disclosure provides a heart rate monitor (HRM) circuit. The HRM circuit includes an analog front end (AFE). The AFE receives a Photoplethysmographic (PPG) signal, and generates a fine PPG signal. A motion cancellation circuit is coupled to the AFE, and receives the fine PPG signal and an accelerometer signal. The motion cancellation circuit subtracts the accelerometer signal from the fine PPG signal to generate a coarse heart rate. A peak detector is coupled to the motion cancellation circuit and the AFE, and generates an instantaneous heart rate. A filter is coupled to the peak detector, and generates an estimated heart rate from the instantaneous heart rate, the estimated heart rate is provided as a feedback to the peak detector.

Abstract: Techniques maintaining receiver reliability, including determining a present attenuation level for an attenuator, wherein the attenuation level is set by a gain controller, determining a relative reliability threshold based on the present attenuation level, receiving a radio frequency (RF) signal, determining a voltage level of the received RF signal, comparing the voltage level of the received RF signal to the relative reliability threshold to determine that a reliability condition exists, and overriding, in response to the determination that the reliability condition exists, the present attenuation level set by the gain controller with an override attenuation level based on the present attenuation level.

Abstract: Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Abstract: A radio frequency transmitter includes an upconverter that outputs in-phase (I) and quadrature (Q) signals, a digital timing offset circuit, first and second digital-to-analog converters (DACs), an analog timing offset removal circuit, first and second pulse shapers, and an adder. The digital timing offset circuit introduces a time offset between the I and Q signals. The first and second DACs output analog I and Q signals, respectively, and have first and second clock signals, respectively. The first and second clock signals have the same frequency and are offset relative to each other by the time offset. The analog timing offset removal circuit removes the time offset between the analog I and Q signals. The first and second pulse shapers receive the analog I and Q signals, respectively, and output pulse-shaped I and Q signals. The adder receives the pulse-shaped I and Q signals and outputs an intermediate frequency signal.

Abstract: One example includes a receiver system. The receiver system includes an analog-to-digital converter (ADC) configured to convert an analog input signal into a digital output signal at a sampling frequency. The receiver system also includes a spur correction system configured to receive the digital output signal and to estimate spurs associated with the digital output signal and to selectively correct a subset of the spurs associated with a set of frequencies that are based on the sampling frequency.

Abstract: A system for generating secondary clock signals from a primary clock signal includes a dithered clock divider which has a first input adapted to receive the primary clock signal and a second input adapted to receive a random division ratio. The dithered clock divider provides a dithered clock signal. The system includes a multi-phase clock generator which has a first input adapted to receive the primary clock signal, a second input adapted to receive the dithered clock signal, and a third input adapted to receive a pseudo-random pattern. The multi-phase clock generator provides the secondary clock signals from multiple phases of the dithered clock signal. The system includes a pseuodo-random pattern generator which provides the pseudo-random pattern.

Abstract: A TX-TX pre-compensation system that estimates unwanted coupling in a victim transmit chain caused by an aggressor transmit chain and injects a pre-compensation signal to cancel out the estimated coupling. In some embodiments, a signal measurement module estimates the amplitude, phase, and envelope delay of the coupling and an isolation pre-compensation module generates the pre-compensation signal based on the estimated amplitude, the estimated phase, the estimated envelope delay, and the difference between the carrier frequencies of the transmit chains. Since the phase of the coupling may be affected by the carrier frequency of the transmit chains, in some embodiments the phase of the pre-compensation signal is adjusted in response to a change in carrier frequency. Since the amplitude of the coupling may be affected by attenuator gain settings, in some embodiments the amplitude of the pre-compensation signal may be adjusted in response to a change in attenuator gain setting.

Abstract: A system for generating secondary clock signals from a primary clock signal includes a dithered clock divider which has a first input adapted to receive the primary clock signal and a second input adapted to receive a random division ratio. The dithered clock divider provides a dithered clock signal. The system includes a multi-phase clock generator which has a first input adapted to receive the primary clock signal, a second input adapted to receive the dithered clock signal, and a third input adapted to receive a pseudo-random pattern. The multi-phase clock generator provides the secondary clock signals from multiple phases of the dithered clock signal. The system includes a pseudo-random pattern generator which provides the pseudo-random pattern.

Abstract: Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Abstract: A phase spectrum based delay estimating method of tracking channel responses, extracting phase responses from the tracked channel responses, and generating a delay estimate, wherein the delay estimate is based on a slope and intercept estimates of the extracted phase responses with high quality metric to improve delay estimation, and a system thereof.

Abstract: Techniques maintaining receiver reliability, including determining a present attenuation level for an attenuator, wherein the attenuation level is set by a gain controller, determining a relative reliability threshold based on the present attenuation level, receiving a radio frequency (RF) signal, determining a voltage level of the received RF signal, comparing the voltage level of the received RF signal to the relative reliability threshold to determine that a reliability condition exists, and overriding, in response to the determination that the reliability condition exists, the present attenuation level set by the gain controller with an override attenuation level based on the present attenuation level.

Abstract: A technique for reinitializing a coupled circuit, the technique including receiving a common configuration value associated with states of a coupled circuit, tracking states associated with the coupled circuit while the coupled circuit is in a low power state based on the common configuration value, receiving the tracked state associated with the coupled circuit, receiving a scaling value associated with the coupled circuit, determining a current state of the coupled circuit based on the tracked state and the scaling value, and transmitting an indication of the current state to the coupled circuit when the coupled circuit has exited the low power state.

Abstract: A channel response generating module and method for generating a channel response based on a ratio of a channel response corresponding to an image signal frequency bin in relation to a channel response corresponding to a traffic signal frequency bin, or a channel response corresponding to a first frequency bin in relation to a channel response corresponding to a second frequency bin, and a zero-IF signal transmitter employing the channel response generating module and method to efficiently suppress image signals or compensate traffic signals during transmission of IQ RF signals.

Abstract: A system includes: a host processor; a transceiver coupled to the host processor; and a power amplifier coupled to an output of the transceiver. The transceiver includes a transmit chain with digital pre-distortion (DPD) logic configured to: perform DPD correction operations on transmit data received by the transmit chain; and output corrected transmit data based on the performed DPD correction operations, wherein the output corrected transmit data is provided to the power amplifier.

Abstract: Techniques maintaining receiver reliability, including determining a present attenuation level for an attenuator, wherein the attenuation level is set by a gain controller, determining a relative reliability threshold based on the present attenuation level, receiving a radio frequency (RF) signal, determining a voltage level of the received RF signal, comparing the voltage level of the received RF signal to the relative reliability threshold to determine that a reliability condition exists, and overriding, in response to the determination that the reliability condition exists, the present attenuation level set by the gain controller with an override attenuation level based on the present attenuation level.

Abstract: An electrical system includes a transceiver with an IQ estimator and an IQ mismatch corrector. The electrical system also includes an antenna coupled to the transceiver. The IQ estimator is configured to perform frequency-domain IQ mismatch analysis to determine an IQ mismatch estimate at available frequency bins of a baseband data signal. The IQ mismatch corrector is configured to correct the baseband data signal based on the IQ mismatch estimate.

Abstract: A system includes: a host processor; a transceiver coupled to the host processor; and a power amplifier coupled to an output of the transceiver. The transceiver includes a transmit chain with digital pre-distortion (DPD) logic configured to: perform DPD correction operations on transmit data received by the transmit chain; and output corrected transmit data based on the performed DPD correction operations, wherein the output corrected transmit data is provided to the power amplifier.

Abstract: An IQ mismatch estimation circuit includes a raw channel estimation circuit, a reference channel estimation circuit, a digital predistortion (DPD) bin identification circuit, a channel estimate pruning circuit, and an IQ correction coefficient generation circuit. The raw channel estimation circuit generates raw channel estimates for a plurality of frequency bins of a baseband signal. The reference channel estimation circuit identifies a reference channel estimate based on the raw channel estimates. The DPD bin identification circuit identifies, based on the reference channel estimate, the frequency bins for which the raw channel estimates are based on a DPD expansion signal. The channel estimate pruning circuit generates pruned raw channel estimates by discarding the raw channel estimates of the frequency bins identified by the DPD bin identification circuit. The IQ correction coefficient generation circuit generates IQ mismatch correction coefficients based on the pruned raw channel estimates.