Patents by Inventor Sasan Cyrusian

Sasan Cyrusian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020175770
    Abstract: An efficient current feedback buffer is revealed. The buffer is useful in power supplies for a number of analog and digital devices, including CMOS voltage controlled ring oscillators, frequency synthesizers, delay locked loops, phase accumulators, and phase locked loops. The power supply and buffer maintains a low impedance output to the load, regulates the voltage output of the supply, and rejects power line noise.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Applicant: Infineon Technologies North America Corp.
    Inventor: Sasan Cyrusian
  • Publication number: 20020175761
    Abstract: A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Applicant: Infineon Technologies North America Corp.
    Inventors: Elmar Bach, Thomas Blon, Sasan Cyrusian, Stephen Franck
  • Publication number: 20020176186
    Abstract: A method and apparatus for running an analog portion (162) of a read/write channel (108) from a highly regulated power supply (260). The apparatus includes an analog portion (162), a clock synthesizer (154), and a highly regulated power supply (260) connected to the analog portion (162) and the clock synthesizer (154). The analog portion (162) and the clock synthesizer (154) both comprise high voltage transistors which operate in a first voltage range and low voltage transistors which operate in a second voltage range, wherein the first voltage range is within the second voltage range. The highly regulated power supply (260) supplies power that is within the first voltage range to the analog portion (162) and the clock synthesizer (154). The method includes generating power that is within the first voltage range using the highly regulated power supply (260), and supplying the power to the analog portion (162) and the clock synthesizer (154).
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Inventors: Sasan Cyrusian, Stephen J. Franck, Sriharsha Annadore, Elmar Bach, Siegfried Hart, Thomas Blon, William G. Bliss, James Wilson Rae, Michael Ruegg, Ulrich Huewels, Fritz Mistlberger
  • Publication number: 20020175729
    Abstract: A high performance differential delay circuit for is revealed. The delay unit may be used in a variety of circuits requiring delay units, including voltage-controlled oscillators, voltage controlled delay lines, delay locked loops, phase accumulators, phase locked loops, and direct frequency syntheses. The circuit is desirably manufactured at one time with CMOS technology, and is therefore relatively immune to temperature changes, manufacturing process variations, input voltage fluctuations, and frequency ranges. The circuit achieves its goals by using a minimum number of transistors, and takes advantage of CMOS manufacturing techniques by balancing the NMOS and PMOS transistors used.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Applicant: Infineon Technologies North America Corp.
    Inventor: Sasan Cyrusian
  • Publication number: 20020175756
    Abstract: A switching Gm cell allowing a wide transconductance range with a limited voltage range. The Gm cell includes a plurality of Gm setting devices, the operation of which is controlled by a Gm setting code. The Gm setting code is inputted into a switching circuit which turns on and off at least one of said Gm setting devices. Thus, coarse adjustments of the overall transconductance of the cell may be adjusted by changing the Gm setting code and fine adjustments may be made by utilizing the conventional method of adjusting a tuning voltage.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Inventor: Sasan Cyrusian
  • Publication number: 20020176189
    Abstract: This invention provides a read/write channel with a multiplex input/output system for a disk drive, which may have one or more magnetic disks, one or more read/write heads, and a read/write channel. The read/write channel may comprise a multiplex input/output (I/O) terminal, a write output driver, and a digital to analog converter. The read/write channel may be implemented on an integrated circuit. The multiplex input/output system may send different signals or voltages through the same input/output terminal at essentially at the same time or different periods of time.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Inventor: Sasan Cyrusian
  • Publication number: 20020175740
    Abstract: A high-speed multiplexer that includes a reduced number of components in the pull-up and/or the pull-down circuits operates faster than conventional multiplexers and can process higher frequency input signals. The pull-up circuit may be a singe p-type MOSFET transistor and the pull-down circuit may be a single n-type MOSFET transistor. The switching circuits may include transistor-based NOR gates. The multiplexer may have numerous channels, for example 2 to 256 or more channels.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Applicant: Infineon Technologies North America Corp.
    Inventors: Michael Ruegg, Sasan Cyrusian
  • Publication number: 20020175738
    Abstract: A method and apparatus is disclosed for minimizing leakage current through a storage switch and improving the off state isolation of the switch from high frequency input fluctuations. Two separate charge stores, a help store and a storage store, are provided which are charged simultaneously when charge is to be stored in the storage switch. The charge stores are maintained on either side of a control switch. The charge differential across the control switch is therefore minimized, minimizing the leakage current from the storage store. Further, switch isolation is improved by the formation of a cascaded capacitive voltage divider from the combination of the help switch and help store and the storage switch and storage store.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Applicant: Infineon Technologies North America Corp.
    Inventor: Sasan Cyrusian
  • Patent number: 6480064
    Abstract: A switching Gm cell allowing a wide transconductance range with a limited voltage range. The Gm cell includes a plurality of Gm setting devices, the operation of which is controlled by a Gm setting code. The Gm setting code is inputted into a switching circuit which turns on and off at least one of said Gm setting devices. Thus, coarse adjustments of the overall transconductance of the cell may be adjusted by changing the Gm setting code and fine adjustments may be made by utilizing the conventional method of adjusting a tuning voltage.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: November 12, 2002
    Assignee: Infineon Technologies AG
    Inventor: Sasan Cyrusian
  • Patent number: 6480128
    Abstract: A sample-and-hold system that includes a first source follower having an input and an output and a second source follower that includes an input connected in series with the output of the first source follower and that furthermore comprises of a sample-and-hold switch connected to an output of the second source follower.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: November 12, 2002
    Assignee: Infineon Technologies AG
    Inventors: Elmar Bach, Sasan Cyrusian
  • Patent number: 6260085
    Abstract: The invention relates to a changeover device which uses both analog and digital signals as input signals and supplies an analog output signal. The changeover device contains a digital-to-analog converter whose output level is adjustable. Matching to the level of the analog input signal is thus achieved. Preferred applications of the invention are picture-in-picture insertions in which an additional picture in analog form is intended to be inserted into a main picture in digital form.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: July 10, 2001
    Assignee: Infineon Technologies AG
    Inventor: Sasan Cyrusian