Patents by Inventor Satoru Machida
Satoru Machida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9425271Abstract: In an IGBT, a trench extending in a bent shape to have a corner is formed in an upper surface of a semiconductor substrate. The inside of the trench is covered with an insulating film. A gate is placed inside the trench. An emitter and a collector are formed on an upper surface and a lower surface of the semiconductor substrate, respectively. An emitter region, a body region, a drift region, and a collector region are formed in the semiconductor substrate. The emitter region is formed of an n-type semiconductor, is in contact with the insulating film, and is in ohmic contact with the emitter electrode. The body region is formed of a p-type semiconductor, is in contact with the insulating film below the emitter region, is in contact with the insulating film of an inner corner portion of the trench, and is in ohmic contact with the emitter electrode.Type: GrantFiled: March 7, 2012Date of Patent: August 23, 2016Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun Saito, Satoru Machida
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Publication number: 20160240641Abstract: A semiconductor device includes: a semiconductor substrate, an upper electrode, a lower electrode and a gate electrode. In the semiconductor substrate, a body region, a pillar region, and a barrier region are formed. The pillar region has an n-type impurity, is formed on a lateral side of the body region, and extends along a depth from a top surface of the semiconductor substrate to a lower end of the body region. The barrier region has an n-type impurity and is formed on a lower side of the body region and the pillar region. The barrier region is formed on the lower side of the pillar region. An n-type impurity concentration distribution in a depth direction in the pillar region and the barrier region has a maximum value in the pillar region. The n-type impurity concentration distribution has a folding point on a side deeper than the maximum value.Type: ApplicationFiled: October 30, 2014Publication date: August 18, 2016Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun OKAWARA, Yusuke YAMASHITA, Satoru MACHIDA
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Patent number: 9412737Abstract: When an IGBT has a barrier layer 10 that separates an upper body region 8a from a lower body region 8b, conductivity modulation is enhanced and on-resistance decreases. When the IGBT also has a Schottky contact region 6 that extends to reach the barrier layer 10, a diode structure can be obtained. In this case, however, a saturation current increases as well as short circuit resistance decreases. The Schottky contact region 6 is separated from the emitter region 4 by the upper body region 8a. By selecting an impurity concentration in the region 8a, an increase in a saturation current can be avoided. Alternatively, a block structure that prevents a depletion layer extending from the region 6 into the region 8a from joining a depletion layer extending from the region 4 into the region 8a may be provided in an area separating the region 6 from the region 4.Type: GrantFiled: May 23, 2013Date of Patent: August 9, 2016Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun Saito, Satoru Machida, Yusuke Yamashita
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Publication number: 20160172453Abstract: A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a drift region of a first conductive type, a body region of a second conductive type that is disposed above the drift region, and a barrier region of the first conductive type that is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer. The barrier region is not contact with a side surface of the insulated trench gate.Type: ApplicationFiled: October 28, 2015Publication date: June 16, 2016Inventors: Yasuhiro HIRABAYASHI, Hiroshi HOSOKAWA, Yoshifumi YASUDA, Akitaka SOENO, Masaru SENOO, Satoru MACHIDA, Yusuke YAMASHITA
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Publication number: 20160172471Abstract: A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a barrier region of the first conductive type, wherein the barrier region is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer. The barrier region includes a first barrier partial region, wherein a distance between the first barrier partial region and the drift region is a first distance, and a second barrier partial region, wherein a distance between the second barrier partial region and the drift region is a second distance which is longer than the first distance. The second barrier partial region is in contact with a side surface of an insulated trench gate.Type: ApplicationFiled: October 28, 2015Publication date: June 16, 2016Inventors: Yasuhiro HIRABAYASHI, Hiroshi HOSOKAWA, Yoshifumi YASUDA, Akitaka SOENO, Masaru SENOO, Satoru MACHIDA, Yusuke YAMASHITA
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Publication number: 20160071841Abstract: When an IGBT has a barrier layer 10 that separates an upper body region 8a from a lower body region 8b, conductivity modulation is enhanced and on-resistance decreases. When the IGBT also has a Schottky contact region 6 that extends to reach the barrier layer 10, a diode structure can be obtained. In this case, however, a saturation current increases as well as short circuit resistance decreases. The Schottky contact region 6 is separated from the emitter region 4 by the upper body region 8a. By selecting an impurity concentration in the region 8a, an increase in a saturation current can be avoided. Alternatively, a block structure that prevents a depletion layer extending from the region 6 into the region 8a from joining a depletion layer extending from the region 4 into the region 8a may be provided in an area separating the region 6 from the region 4.Type: ApplicationFiled: May 23, 2013Publication date: March 10, 2016Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun SAITO, Satoru MACHIDA, Yusuke YAMASHITA
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Patent number: 9276137Abstract: A diode is provided with a pillar region formed so as to extend between a barrier region and an anode electrode, contact the barrier region, and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region; and a barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode. The barrier height adjusting region includes at least one component selected from the group consisting of a second conductivity type semiconductor having a concentration lower than that of an anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i-type semiconductor. The barrier height adjusting region and the anode electrode are connected through a Schottky junction.Type: GrantFiled: January 15, 2014Date of Patent: March 1, 2016Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yusuke Yamashita, Satoru Machida, Jun Saito, Masaru Senoo, Jun Okawara
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Publication number: 20150325709Abstract: A semiconductor device is provided with a semiconductor layer including Si and a Schottky electrode being in Schottky contact with at least a part of one of main surfaces of the semiconductor layer. A material of the Schottky electrode is a Al—Si alloy including at least one metal selected from the group consisting of Ti, Ta, Nb, Hf, Zr, W, Mo and V.Type: ApplicationFiled: March 13, 2015Publication date: November 12, 2015Inventors: Takahiro ITO, Toru ONISHI, Hideya YAMADERA, Satoru MACHIDA, Yusuke YAMASHITA
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Patent number: 9159721Abstract: A technology for inhibiting gate interference in an RC-IGBT employing a diode structure having Schottky connections is provided. A semiconductor device includes a semiconductor substrate including a diode region and an IGBT region. In this semiconductor device, the diode region includes: a p-type anode region connected to an anode electrode by an Ohmic contact; a plurality of n-type pillar regions connected to the anode electrode by Schottky contacts; an n-type barrier region; an n-type diode drift region; and an n-type cathode region. An on-resistance of a first pillar region with respect to the anode electrode is higher than an on-resistance of a second pillar region with respect to the anode electrode. The second pillar region is located at a position close to the IGBT region.Type: GrantFiled: February 9, 2015Date of Patent: October 13, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun Okawara, Yusuke Yamashita, Satoru Machida
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Patent number: 9153576Abstract: A semiconductor substrate comprises an IGBT region and a diode region. The IGBT region comprises: an n-type emitter region; a p-type IGBT body region; an n-type IGBT barrier region; an n-type IGBT drift region; a p-type collector region; a first trench; a first insulating layer; and a first gate electrode. The diode region comprises: a p-type diode top body region; an n-type diode barrier region; a p-type diode bottom body region; an n-type cathode region; a second trench; a second insulating layer; and a second gate electrode. An n-type impurity density of a specific part of the diode barrier region making contact with the second insulating layer is higher than an n-type impurity density of the IGBT barrier region.Type: GrantFiled: December 29, 2014Date of Patent: October 6, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi Hosokawa, Yusuke Yamashita, Satoru Machida
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Publication number: 20150279953Abstract: A semiconductor device is provided with a silicon layer, an upper surface side aluminum layer containing silicon and an insulation film. The upper surface side aluminum layer contacts and is layered on a part of a surface of the silicon layer. The insulation film contacts and is layered on another part of the surface of the silicon layer. The insulation film is adjacent to and contacts the upper surface side aluminum layer. The insulation film includes an insulation film body and a plurality of first nodule segregated portions projecting from the insulation film body toward the upper surface side aluminum layer as seen along a vertical direction relative to the surface of the silicon layer. A corner is formed by a side surface of the insulation film body and a side surface of each of the first nodule segregated portions as seen along the vertical direction.Type: ApplicationFiled: March 6, 2015Publication date: October 1, 2015Inventors: Satoru MACHIDA, Yusuke YAMASHITA, Koichi NISHIKAWA, Masaru SENOO, Jun OKAWARA, Yoshifumi YASUDA, Hiroshi HOSOKAWA, Yasuhiro HIRABAYASHI
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Publication number: 20150249083Abstract: A technology for inhibiting gate interference in an RC-IGBT employing a diode structure having Schottky connections is provided. A semiconductor device includes a semiconductor substrate including a diode region and an IGBT region. In this semiconductor device, the diode region includes: a p-type anode region connected to an anode electrode by an Ohmic contact; a plurality of n-type pillar regions connected to the anode electrode by Schottky contacts; an n-type barrier region; an n-type diode drift region; and an n-type cathode region. An on-resistance of a first pillar region with respect to the anode electrode is higher than an on-resistance of a second pillar region with respect to the anode electrode. The second pillar region is located at a position close to the IGBT region.Type: ApplicationFiled: February 9, 2015Publication date: September 3, 2015Inventors: Jun OKAWARA, Yusuke YAMASHITA, Satoru MACHIDA
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Patent number: 9099521Abstract: A reverse conducting IGBT that includes an insulated gate; a semiconductor layer having a first conductivity type drift region, a second conductivity type body region, a first conductivity type emitter region, and a second conductivity type intermediate region; and an emitter electrode provided on a surface of the semiconductor layer. The first conductivity type drift region of the semiconductor layer contacts the insulated gate. The second conductivity type body region of the semiconductor layer is provided on the drift region and contacts the insulated gate. The first conductivity type emitter region of the semiconductor layer is provided on the body region and contacts the insulated gate. The second conductivity type intermediate region of the semiconductor layer is provided on the emitter region and is interposed between the emitter region and the emitter electrode.Type: GrantFiled: February 18, 2014Date of Patent: August 4, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yusuke Yamashita, Satoru Machida, Jun Saito
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Publication number: 20150214217Abstract: A semiconductor substrate comprises an IGBT region and a diode region. The IGBT region comprises: an n-type emitter region; a p-type IGBT body region; an n-type IGBT barrier region; an n-type IGBT drift region; a p-type collector region; a first trench; a first insulating layer; and a first gate electrode. The diode region comprises: a p-type diode top body region; an n-type diode barrier region; a p-type diode bottom body region; an n-type cathode region; a second trench; a second insulating layer; and a second gate electrode. An n-type impurity density of a specific part of the diode barrier region making contact with the second insulating layer is higher than an n-type impurity density of the IGBT barrier region.Type: ApplicationFiled: December 29, 2014Publication date: July 30, 2015Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroshi HOSOKAWA, Yusuke YAMASHITA, Satoru MACHIDA
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Publication number: 20150206960Abstract: A semiconductor device 1 in which an IGBT region 2 and a diode region 3 adjoining each other are formed on a same substrate 4 is presented. The semiconductor device 1 is provided with a plurality of first gate trenches 11 extending abreast in a first direction in the IGBT region 2 and a plurality of second gate trenches 12 extending abreast in a second direction intersecting the first direction. The first gate trenches 11 and the second gate trenches 12 are not in contact with each other.Type: ApplicationFiled: December 9, 2014Publication date: July 23, 2015Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuhiro HIRABAYASHI, Satoru MACHIDA, Yusuke YAMASHITA
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Publication number: 20140252408Abstract: A reverse conducting IGBT that includes an insulated gate; a semiconductor layer having a first conductivity type drift region, a second conductivity type body region, a first conductivity type emitter region, and a second conductivity type intermediate region; and an emitter electrode provided on a surface of the semiconductor layer. The first conductivity type drift region of the semiconductor layer contacts the insulated gate. The second conductivity type body region of the semiconductor layer is provided on the drift region and contacts the insulated gate. The first conductivity type emitter region of the semiconductor layer is provided on the body region and contacts the insulated gate. The second conductivity type intermediate region of the semiconductor layer is provided on the emitter region and is interposed between the emitter region and the emitter electrode.Type: ApplicationFiled: February 18, 2014Publication date: September 11, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yusuke YAMASHITA, Satoru MACHIDA, Jun SAITO
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Publication number: 20140231867Abstract: A diode is provided with a pillar region formed so as to extend between a barrier region and an anode electrode, contact the barrier region, and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region; and a barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode. The barrier height adjusting region includes at least one component selected from the group consisting of a second conductivity type semiconductor having a concentration lower than that of an anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i-type semiconductor. The barrier height adjusting region and the anode electrode are connected through a Schottky junction.Type: ApplicationFiled: January 15, 2014Publication date: August 21, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yusuke YAMASHITA, Satoru MACHIDA, Jun SAITO, Masaru SENOO, Jun OKAWARA
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Publication number: 20140054645Abstract: In an IGBT, a trench extending in a bent shape to have a corner is formed in an upper surface of a semiconductor substrate. The inside of the trench is covered with an insulating film. A gate is placed inside the trench. An emitter and a collector are formed on an upper surface and a lower surface of the semiconductor substrate, respectively. An emitter region, a body region, a drift region, and a collector region are formed in the semiconductor substrate. The emitter region is formed of an n-type semiconductor, is in contact with the insulating film, and is in ohmic contact with the emitter electrode. The body region is formed of a p-type semiconductor, is in contact with the insulating film below the emitter region, is in contact with the insulating film of an inner corner portion of the trench, and is in ohmic contact with the emitter electrode.Type: ApplicationFiled: March 7, 2012Publication date: February 27, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Jun Saito, Satoru Machida
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Publication number: 20140048847Abstract: Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.Type: ApplicationFiled: July 27, 2012Publication date: February 20, 2014Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHOInventors: Yusuke Yamashita, Satoru Machida, Takahide Sugiyama, Jun Saito
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Patent number: 8530958Abstract: A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating film for charge storage. A first side wall is formed on a side face of the memory gate electrode, and at a side face of the first side wall, a second side wall is formed. On an upper surface of an n+-type semiconductor region for source in the memory cell there is formed a silicide layer whose end portion on the memory gate electrode MG side is defined by the second side wall.Type: GrantFiled: March 5, 2010Date of Patent: September 10, 2013Assignee: Renesas Electronics CorporationInventors: Koichi Toba, Yasushi Ishii, Yoshiyuki Kawashima, Satoru Machida, Munekatsu Nakagawa, Kentaro Saito, Toshikazu Matsui, Takashi Hashimoto, Kosuke Okuyama