Patents by Inventor Satoru Sugimoto

Satoru Sugimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9165923
    Abstract: Disclosed herein is a device that includes: a plurality of first standard cells arranged on a semiconductor substrate in a first direction, each of the first standard cells including at least one field-effect transistor; and a first power supply wiring extending in the first direction along one end of the first standard cells in a second direction. The field-effect transistor including a gate electrode formed on a gate wiring layer. The first power supply wiring being formed on the gate wiring layer.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: October 20, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Satoru Sugimoto, Takanari Shimizu
  • Publication number: 20140177339
    Abstract: A nonvolatile semiconductor memory device includes a first string including a first number of memory cells connected in series each storing therein information in a nonvolatile manner; and a second string including a second number of memory cells connected in series each storing therein information in a nonvolatile manner, wherein the second number is smaller than the first number.
    Type: Application
    Filed: September 27, 2013
    Publication date: June 26, 2014
    Applicant: Elpida Memory, Inc.
    Inventors: Naoharu SHINOZAKI, Masao TAGUCHI, Takahiro HATADA, Satoru SUGIMOTO, Satoshi SAKURAKAWA
  • Patent number: 8553459
    Abstract: A nonvolatile semiconductor memory device includes a first string including a first number of memory cells connected in series each storing therein information in a nonvolatile manner; and a second string including a second number of memory cells connected in series each storing therein information in a nonvolatile manner, wherein the second number is smaller than the first number.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: October 8, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Naoharu Shinozaki, Masao Taguchi, Takahiro Hatada, Satoru Sugimoto, Satoshi Sakurakawa
  • Publication number: 20130228877
    Abstract: Disclosed herein is a device that includes: a plurality of first standard cells arranged on a semiconductor substrate in a first direction, each of the first standard cells including at least one field-effect transistor; and a first power supply wiring extending in the first direction along one end of the first standard cells in a second direction. The field-effect transistor including a gate electrode formed on a gate wiring layer. The first power supply wiring being formed on the gate wiring layer.
    Type: Application
    Filed: March 5, 2013
    Publication date: September 5, 2013
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Satoru Sugimoto, Takanari Shimizu
  • Patent number: 8363466
    Abstract: At the time of reading, an unselected word line voltage is fixed to a first predetermined voltage (0 V or 3 V), and when selecting a word line, a selected word line voltage is set to a second predetermined voltage (?3.5 V or 0 V). This configuration eliminates an application of a pulsed voltage to the word line at the time of reading, making it possible to reduce an influence of read disturbance. In addition, even when a voltage in a range from a power source voltage to a ground voltage or a voltage over the power source voltage is required at the time of reading, it becomes a voltage about 1.5 times an absolute value of the power source voltage. Therefore, a voltage step-up circuit having a large number of stages is not required, and as a result, it is possible to achieve a reduced operation time with a low power consumption.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: January 29, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Naoharu Shinozaki, Masao Taguchi, Satoru Sugimoto
  • Publication number: 20110261622
    Abstract: A nonvolatile semiconductor memory device includes a first string including a first number of memory cells connected in series each storing therein information in a nonvolatile manner; and a second string including a second number of memory cells connected in series each storing therein information in a nonvolatile manner, wherein the second number is smaller than the first number.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 27, 2011
    Applicant: Elpida Memory, Inc.
    Inventors: Naoharu Shinozaki, Masao Taguchi, Takahiro Hatada, Satoru Sugimoto, Satoshi Sakurakawa
  • Publication number: 20110157978
    Abstract: At the time of reading, an unselected word line voltage is fixed to a first predetermined voltage (0 V or 3 V), and when selecting a word line, a selected word line voltage is set to a second predetermined voltage (?3.5 V or 0 V). This configuration eliminates an application of a pulsed voltage to the word line at the time of reading, making it possible to reduce an influence of read disturbance. In addition, even when a voltage in a range from a power source voltage to a ground voltage or a voltage over the power source voltage is required at the time of reading, it becomes a voltage about 1.5 times an absolute value of the power source voltage. Therefore, a voltage step-up circuit having a large number of stages is not required, and as a result, it is possible to achieve a reduced operation time with a low power consumption.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 30, 2011
    Applicant: Elpida Memory, Inc.
    Inventors: Naoharu Shinozaki, Masao Taguchi, Satoru Sugimoto
  • Patent number: D630556
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: January 11, 2011
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Masanari Sakae, Satoru Sugimoto
  • Patent number: D679635
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: April 9, 2013
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Satoru Sugimoto, Shinichi Hiranaka, Shin Miyata
  • Patent number: D680906
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: April 30, 2013
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Satoru Sugimoto, Shinichi Hiranaka, Shin Miyata, Masanari Sakae, Hiroyuki Tada
  • Patent number: D688999
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: September 3, 2013
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D701475
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: March 25, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D705705
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: May 27, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D707594
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: June 24, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D714197
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: September 30, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D715709
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 21, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Matsumoto, Shinichi Hiranaka, Shin Miyata, Satoru Sugimoto
  • Patent number: D723427
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: March 3, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Tatsuya Takei, Pansoo Kwon, Satoru Sugimoto
  • Patent number: D725006
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: March 24, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Tatsuya Takei, Satoru Sugimoto, Pansoo Kwon
  • Patent number: D725010
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: March 24, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Tatsuya Takei, Satoru Sugimoto, Pansoo Kwon
  • Patent number: D741523
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: October 20, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Satoru Sugimoto, Tatsuya Takei