Patents by Inventor Satoru Tomekawa

Satoru Tomekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7531754
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Patent number: 7522938
    Abstract: Based on information indicating the signal transmission amount between the first and second circuit blocks, a switching device switches an optical signal communication form which uses a first and second optical signal transmitting/receiving devices and an electric signal communication form which uses a first and second electric signal transmitting/receiving devices. Thereby, in a portable information terminal apparatus with a separate main body operation unit and a separate screen display unit, power consumed by the optical signal communication can be suppressed.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: April 21, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshihiro Tomita, Yasushi Nakagiri, Tsuguhiro Korenaga, Kunio Hibino, Seiji Karashima, Satoru Tomekawa
  • Publication number: 20090049687
    Abstract: [Problem] To improve productivity and reliability in mounting an electronic component. [Means for Solving Problems] At least one of an electrode terminal of an electronic component and a connecting terminal of a wiring substrate is provided with solder beforehand, one of the wiring substrate and the electronic component is secured, and the electrode terminal of the electronic component and the connecting terminal of the wiring substrate are made to abut each other in a state where one of the wiring substrate and the electronic component, whichever is not secured, is held. Then, the electronic component is heated so that the solder is melted, and the solder is solidified while the electronic component is held, so that the electrode terminal and the connecting terminal are bonded to each other by means of the solder.
    Type: Application
    Filed: March 17, 2006
    Publication date: February 26, 2009
    Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Shinobu Masuda, Satoru Tomekawa
  • Publication number: 20090032285
    Abstract: A method of manufacturing a multilayered circuit board includes the steps of: manufacturing a laminated body by laminating a prepreg of a predetermined thickness on at least one surface of a double-sided circuit board having a grounding link and a signal wiring patterned on both surfaces thereof; and applying heat and pressure to the laminated body and completing a layered structure in which the signal wiring is laid inside the prepreg at a boundary between the double-sided circuit board and the prepreg, wherein prepreg sheets of a predetermined thickness are used in a completed layered structure so that a thickness of a prepreg of the double-sided circuit board is smaller than a distance between a surface of the prepreg on a side not opposed to the double-sided circuit board and the signal wiring laid inside the prepreg.
    Type: Application
    Filed: January 27, 2005
    Publication date: February 5, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoji Ueda, Susumu Matsuoka, Rikiya Okimoto, Shozo Ochi, Satoru Tomekawa
  • Publication number: 20080210458
    Abstract: A flexible substrate comprises: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 4, 2008
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Publication number: 20080185178
    Abstract: A circuit board of the present invention, includes: an electrical insulating layer including at least one layer of electrical insulating base; and a conductive portion formed in a via hole provided in the electrical insulating base. A land for mounting only is disposed on at least one surface of the electrical insulating base that is arranged at an outermost layer. According to a method for manufacturing a circuit board of the present invention, includes the steps of: forming a via hole in an electrical insulating base; filling the via hole with a conductive paste; laminating a metal foil or a releasing sheet on the electrical insulating base, and placing a jig for pressing above and below the lamination, followed by hot-pressing so as to apply heat and pressure thereto, so as to form a conductive portion made of the conductive paste in the via hole; and forming a land for mounting only on at least one surface of the electrical insulating base that is arranged at an outermost layer.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 7, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Rikiya Okimoto, Yoji Ueda, Satoru Tomekawa, Tousaku Nishiyama, Shozo Ochi
  • Publication number: 20080017995
    Abstract: There is provided a flip chip mounting process which is high in productivity and reliability, and thus can be applicable to the flip chip mounting of the next-generation LSI. This flip chip mounting process comprises the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. This heating step is carried out at a temperature higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12).
    Type: Application
    Filed: September 7, 2005
    Publication date: January 24, 2008
    Inventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
  • Patent number: 7321496
    Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Publication number: 20070257362
    Abstract: There is provided a process for forming bumps wherein a plurality of fine bumps are uniformly formed with high productivity. In this process, a resin (13) comprising solder powder and a convection additive (12) is supplied onto a substrate (10) having a plurality of electrodes (11) thereon. And subsequently the substrate (10) is heated to a temperature that enables the solder powder to melt while keeping a flat plate (14) in contact with a surface of the supplied resin (13). During this heating step, the molten solder powder is allowed to self-assemble onto the electrodes (11) so that a plurality of solder balls resulting from the grown molten solder powder are concurrently formed on the electrodes (11) in self-alignment manner. Finally, by moving the flat plate (14) away from the surface of the supplied resin (13), followed by removing such resin (13), there is provided the substrate (10) wherein the bumps (16) are formed on the plurality of the electrodes.
    Type: Application
    Filed: August 30, 2005
    Publication date: November 8, 2007
    Inventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
  • Publication number: 20070151756
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Application
    Filed: March 2, 2007
    Publication date: July 5, 2007
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Patent number: 7205483
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: April 17, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Patent number: 7184617
    Abstract: A portable device has a configuration such that a plurality of housings are connected functionally, wherein the thickness of a connection section between the housings is reduced so that the portability is improved. The portable device includes a first housing; a first board provided in the first housing; a second housing; a second board provided in the second housing; a connection section for connecting the first housing with the second housing in such a manner that their relative position can be changed; and an optical waveguide film having at least one optical waveguide for connecting the first board with the second board through optical wiring.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: February 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsuguhiro Korenaga, Kunio Hibino, Nobuki Itoh, Mikihiro Shimada, Yoshihiro Tomita, Yasushi Nakagiri, Satoru Tomekawa, Seiji Karashima
  • Publication number: 20060283626
    Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.
    Type: Application
    Filed: August 29, 2006
    Publication date: December 21, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
  • Patent number: 7103971
    Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: September 12, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
  • Patent number: 7056571
    Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate, wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except for top portions of the yarns.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: June 6, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoru Tomekawa, Tetsuyoshi Ogura, Hiroyoshi Tagi
  • Patent number: 7047629
    Abstract: A circuit board manufacturing method including the steps of forming a through hole on an insulator layer and then filling the through hole with a conductive paste; dispersing and forming a protective agent on an adhesion surface of a conductor foil so as to include adhesion surface regions where the protective agent does not exist; sticking the conductor foil to the insulator layer; and abutting a plurality of conductive powders constituting the conductive paste and the conductor foil to each other through the adhesion surface regions by means of heating and pressurizing the insulator layer and conductor foil.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: May 23, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinobu Kokufu, Takeshi Suzuki, Fumio Echigo, Daizo Andoh, Tatsuo Ogawa, Yoshihiro Kawakita, Satoru Tomekawa
  • Publication number: 20060091524
    Abstract: A semiconductor module, comprising: a semiconductor element having a principal face on which an element electrode is formed; and a film member comprising an insulating resin layer having a front face and a rear face which is opposite to said front face, and a wiring pattern formed on the rear face of said layer, wherein said semiconductor element is superposed on said film member so that the principal face of said semiconductor element is in contact with the front face of the insulating resin layer of said film member; and a part of the wiring pattern of said film member extends through said insulating resin layer, so that said part is in contact with the element electrode of said semiconductor element.
    Type: Application
    Filed: November 1, 2005
    Publication date: May 4, 2006
    Inventors: Seiji Karashima, Yoshihisa Yamashita, Seiichi Nakatani, Toshiyuki Kojima, Shingo Komatsu, Satoru Tomekawa
  • Patent number: 6996902
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: February 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
  • Publication number: 20050281555
    Abstract: Based on information indicating the signal transmission amount between the first and second circuit blocks, a switching device switches an optical signal communication form which uses a first and second optical signal transmitting/receiving devices and an electric signal communication form which uses a first and second electric signal transmitting/receiving devices. Thereby, in a portable information terminal apparatus with a separate main body operation unit and a separate screen display unit, power consumed by the optical signal communication can be suppressed.
    Type: Application
    Filed: June 10, 2005
    Publication date: December 22, 2005
    Inventors: Yoshihiro Tomita, Yasushi Nakagiri, Tsuguhiro Korenaga, Kunio Hibino, Seiji Karashima, Satoru Tomekawa
  • Publication number: 20050205291
    Abstract: A process for producing a flexible substrate comprising of a film, an insulating resin layer, and a wiring pattern, said process comprising the steps of: (a) preparing a sheet member comprising, (i) the film, (ii) the insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face, and (iii) a front-sided wiring pattern embedded in said insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (b) pressing a part of at least one of said front-sided wiring pattern and said rear-sided wiring pattern into the inside of said sheet member so that a part of said front-sided wiring pattern and a part of said rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Application
    Filed: March 15, 2005
    Publication date: September 22, 2005
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima