Patents by Inventor Satoru Tomekawa
Satoru Tomekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050205294Abstract: A flexible substrate comprising: (i) a film; (ii) an insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (iv) a via which is located between a front-sided wiring pattern and a rear-sided wiring pattern and serves to electrically connect between said front-sided wiring pattern and said rear-sided wiring pattern; wherein said insulating resin layer formed on each of said front face and said rear face of the said film is thicker than said film.Type: ApplicationFiled: March 15, 2005Publication date: September 22, 2005Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
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Publication number: 20050201693Abstract: Provided is a portable device having such a configuration that a plurality of housings are connected functionally, wherein the thickness of a connection section between the housings is reduced so that the portability is improved. The portable device comprising: a first housing; a first board provided in the first housing; a second housing; a second board provided in the second housing; a connection section for connecting the first housing with the second housing in such a manner that the irrelative position can be changed; and an optical waveguide film having at least one optical waveguide for connecting the first board with the second board through optical wiring.Type: ApplicationFiled: March 10, 2005Publication date: September 15, 2005Inventors: Tsuguhiro Korenaga, Kunio Hibino, Nobuki Itoh, Mikihiro Shimada, Yoshihiro Tomita, Yasushi Nakagiri, Satoru Tomekawa, Seiji Karashima
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Patent number: 6930395Abstract: A connecting strength at a bonding site between a wiring layer 1c and a conductor 1d is enhanced by comparing a bonding strength between a wiring layer 14 provided by covering the conductor 1d on an insulating base 1a and the conductor 1d with a bonding strength between the wiring layer 1c and the insulating base 1a in an adjacency of the conductor to set the latter relatively lower.Type: GrantFiled: December 3, 2001Date of Patent: August 16, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Satoru Tomekawa, Yoshihisa Yamashita, Takeshi Suzuki, Yoshihiro Kawakita, Tadashi Nakamura
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Publication number: 20050139384Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.Type: ApplicationFiled: February 18, 2005Publication date: June 30, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
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Publication number: 20050124197Abstract: A circuit board of the present invention, includes: an electrical insulating layer including at least one layer of electrical insulating base; and a conductive portion formed in a via hole provided in the electrical insulating base. A land for mounting only is disposed on at least one surface of the electrical insulating base that is arranged at an outermost layer. According to a method for manufacturing a circuit board of the present invention, includes the steps of: forming a via hole in an electrical insulating base; filling the via hole with a conductive paste; laminating a metal foil or a releasing sheet on the electrical insulating base, and placing a jig for pressing above and below the lamination, followed by hot-pressing so as to apply heat and pressure thereto, so as to form a conductive portion made of the conductive paste in the via hole; and forming a land for mounting only on at least one surface of the electrical insulating base that is arranged at an outermost layer.Type: ApplicationFiled: December 3, 2004Publication date: June 9, 2005Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Rikiya Okimoto, Yoji Ueda, Satoru Tomekawa, Tousaku Nishiyama, Shozo Ochi
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Patent number: 6866892Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.Type: GrantFiled: June 27, 2003Date of Patent: March 15, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
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Publication number: 20050014035Abstract: A prepreg for a printed wiring board includes fluorocarbon fibers as a reinforcing material, and the reinforcing material is impregnated with a resin. The fluorocarbon fibers include short fibers having a branch structure. The reinforcing material includes a nonwoven fabric formed by interlacing the fluorocarbon fibers in the thickness direction. The proportion of the fluorocarbon fibers among the fibers constituting the nonwoven fabric ranges from 50 wt % to 100 wt %, and the remaining fibers are synthetic fibers or inorganic fibers. The nonwoven fabric is heat-treated at 330° C. to 390° C., then annealed at 200° C. to 270° C., and impregnated with the resin. This prepreg can used to provide a printed wiring board with low Interstitial Via Hole connection resistance and high connection stability and a method for manufacturing the printed wiring board.Type: ApplicationFiled: July 12, 2004Publication date: January 20, 2005Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yasushi Nakagiri, Shinobu Masuda, Shozo Ochi, Satoru Tomekawa
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Patent number: 6774316Abstract: The present invention aims to provide a wiring substrate highly reliable in insulation and connection and a method for manufacturing the wiring substrate. A wiring substrate having two or more wiring layers, insulation layers interposed between the neighboring wiring layers and containing an organic resin, and a via formed in the insulation layers and extended between neighboring wiring layers. The via including functional substances, as well as some of the voids (first voids) where at least the organic resins from the insulation layers exist and the remaining voids (second voids) where a gas exists.Type: GrantFiled: July 26, 2001Date of Patent: August 10, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Tatsuo Ogawa, Satoru Tomekawa, Yoshihiro Bessho, Tousaku Nishiyama, Tetsuyoshi Ogura
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Publication number: 20040142154Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except top portions of the yarns.Type: ApplicationFiled: December 19, 2003Publication date: July 22, 2004Inventors: Satoru Tomekawa, Tetsuyoshi Ogura, Hiroyoshi Tagi
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Publication number: 20040080918Abstract: A protective agent 6 for protecting a wiring 1 is dispersed and placed in mottle-like on an interface between a via 3 and a wiring layer 2. Then, each dimension of interface regions 7 where the protective agent 6 does not exist is set to such a size that a plurality of conductive powders 4 constituting the via 3 can abutted on the wiring layer 2. Therefore, the plurality of conductive powders 4 and the wiring layer 2 are abutted each other in each interface region 7 where the protective agent 6 does not exist to electrically connect, thereby stabilizing the connection resistance for a prolonged period of time.Type: ApplicationFiled: October 17, 2003Publication date: April 29, 2004Applicant: MUTSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Shinobu Kokufu, Takeshi Suzuki, Fumio Echigo, Daizo Andoh, Tatsuo Ogawa, Yoshihiro Kawakita, Satoru Tomekawa
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Patent number: 6713688Abstract: A protective agent 6 for protecting a wiring 1 is dispersed and placed in mottle-like on an interface between a via 3 and a wiring layer 2. Then, each dimension of interface regions 7 where the protective agent 6 does not exist is set to such a size that a plurality of conductive powders 4 constituting the via 3 can abutted on the wiring layer 2. Therefore, the plurality of conductive powders 4 and the wiring layer 2 are abutted each other in each interface region 7 where the protective agent 6 does not exist to electrically connect, thereby stabilizing the connection resistance for a prolonged period of time.Type: GrantFiled: November 8, 2001Date of Patent: March 30, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shinobu Kokufu, Takeshi Suzuki, Fumio Echigo, Daizo Andoh, Tatsuo Ogawa, Yoshihiro Kawakita, Satoru Tomekawa
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Patent number: 6691409Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.Type: GrantFiled: October 25, 2002Date of Patent: February 17, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Tatsuo Ogawa, Yoshihiro Bessho, Satoru Tomekawa, Yasuhiro Nakatani, Yoji Ueda, Susumu Matsuoka, Daizo Andoh, Fumio Echigo
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Publication number: 20040020046Abstract: The present invention provides a method for manufacturing a conductive paste. The method includes deforming conductive particles so that a deformation degree is 1.01 to 1.5 by application of a stress to the conductive particles and mixing the deformed conductive particles with a binder that includes a thermosetting resin as the main component. The deformation degree is determined by dividing an average diameter of the conductive particles after deformation by an average diameter of the conductive particles before deformation, where the average diameter is measured by a laser diffraction method. The use of this conductive paste for a prepreg sheet having limited compressibility can suppress a short circuit between via holes and the degradation of insulation properties.Type: ApplicationFiled: June 6, 2003Publication date: February 5, 2004Inventors: Takeshi Suzuki, Satoru Tomekawa, Yosihiro Tomita, Yuichiro Sugita, Shigeru Yamane
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Patent number: 6686029Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.Type: GrantFiled: February 24, 2003Date of Patent: February 3, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
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Publication number: 20040005443Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.Type: ApplicationFiled: June 27, 2003Publication date: January 8, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
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Publication number: 20030170434Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.Type: ApplicationFiled: March 14, 2003Publication date: September 11, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
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Publication number: 20030157307Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.Type: ApplicationFiled: February 24, 2003Publication date: August 21, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
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Patent number: 6596381Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.Type: GrantFiled: September 26, 2001Date of Patent: July 22, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
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Patent number: 6558780Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.Type: GrantFiled: October 25, 2001Date of Patent: May 6, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
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Publication number: 20030066683Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.Type: ApplicationFiled: October 25, 2002Publication date: April 10, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Tatsuo Ogawa, Yoshihiro Bessho, Satoru Tomekawa, Yasuhiro Nakatani, Yoji Ueda, Susumu Matsuoka, Daizo Andoh, Fumio Echigo