Patents by Inventor Satoshi Asai

Satoshi Asai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9959032
    Abstract: An information processing apparatus, method and computer program product are described. At least the apparatus includes comprising a display control device that controls a display of a lock release screen that has displayed thereon a manipulation object and a target object. A manipulation detection device detects a lock release manipulation as a detected moving of the manipulation object toward the target object. The display control device changes an appearance of the target object in response to the manipulation detection device detecting the moving of the manipulation object toward the target object.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: May 1, 2018
    Assignee: SONY CORPORATION
    Inventors: Yunha Cho, Satoshi Asai
  • Publication number: 20180107115
    Abstract: A film material includes a support film having a transmittance of at least 60% with respect to light of wavelength 300-450 nm, and a resin layer containing 0.001-10 wt % of a basic compound with a molecular weight of up to 10,000, and having a thickness of 1-100 ?m. A pattern is formed by attaching the resin layer in the film material to a chemically amplified negative resist layer on a wafer, exposing, baking, and developing the resist layer. The profile of openings in the pattern is improved.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Satoshi Asai, Kyoko Soga, Hideto Kato
  • Publication number: 20180107116
    Abstract: To provide a laminate which enables pattern formation with excellent opening shape even in the case where a chemically amplified negative type resist material is used, and a pattern forming method in which the laminate is used. The laminate includes a chemically amplified negative type resist layer, and a basic resin coat layer thereon that contains 0.001 to 10% by weight of a basic compound having a molecular weight of up to 10,000.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Satoshi Asai, Kyoko Soga, Hideto Kato
  • Publication number: 20180088291
    Abstract: An optical transmission substrate of the disclosure includes a wiring substrate and an optical transmission line. The wiring substrate includes one main surface which includes a mounting area for a photoelectric conversion element. The optical transmission line includes a first cladding portion which is disposed on the one main surface of the wiring substrate and has a layer shape, at least one core portion which is disposed on the first cladding portion and has a strip shape, and a second cladding portion which is disposed on a part of the at least one core portion. The optical transmission line includes an end portion which is positioned in the mounting area. The end portion includes a part of the at least one core portion.
    Type: Application
    Filed: April 21, 2016
    Publication date: March 29, 2018
    Applicant: KYOCERA Corporation
    Inventor: Satoshi ASAI
  • Publication number: 20170315715
    Abstract: An information processing apparatus according to an embodiment of the present technology includes a detection unit, an acceptance unit, and an image control unit. The detection unit is capable of detecting whether or not each of a plurality of reproduction apparatuses constitutes a group related to reproduction of content, each of the plurality of reproduction apparatuses being connected to a network, each of the plurality of reproduction apparatuses being capable of reproducing the content. The acceptance unit accepts a user operation related to constitution of the group. The image control unit outputs a group state image on the basis of a detection result by the detection unit, the group state image representing a constitution state of the group, the group state image including an image of each of the plurality of reproduction apparatuses, and controls the group state image in response to the accepted user operation related to constitution of the group.
    Type: Application
    Filed: October 26, 2015
    Publication date: November 2, 2017
    Applicant: SONY CORPORATION
    Inventors: Koji FUJITA, Satoshi ASAI, Naohiro URIYA, Kenichiro TAKYU, Minako KAWATA, Hisanori NAGATA, Takashi ONOHARA, Ryo SOKABE, Naoki YUASA, Takuma HIGO
  • Publication number: 20170250162
    Abstract: A method for manufacturing a semiconductor apparatus, including preparing a first substrate provided with a pad optionally having a plug and a second substrate or device provided with a plug, forming a solder ball on at least one of the pad or plug of first substrate and the plug of second substrate or device, covering at least one of a pad-forming surface of first substrate and a plug-forming surface of second substrate or device with a photosensitive insulating layer, forming an opening on the pad or plug of the substrate or device that has been covered with photosensitive insulating layer by lithography, pressure-bonding the second substrate or device's plug to the pad or plug of first substrate with the solder ball through the opening, electrically connecting pad or plug of first substrate to second substrate or device's plug by baking, and curing photosensitive insulating layer by baking.
    Type: Application
    Filed: February 7, 2017
    Publication date: August 31, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Kyoko SOGA, Satoshi ASAI
  • Patent number: 9720186
    Abstract: An optical connector has a receptacle which is fastened on a substrate provided with an optical waveguide, and a plug which holds an optical fiber and is positioned with respect to the receptacle. In the receptacle, an exposing opening for exposing an end face of the optical waveguide and a pin hole which opens in an opening direction of the exposing opening are provided. The plug has a facing surface facing the receptacle; a protruding part which protrudes from the facing surface, is formed integrally with the facing surface, exposes the an end face of the optical fiber on its front end face, and is inserted into the exposing opening; and the pin which is provided on the facing surface and is fitted in the pin hole. The front end face of the protruding part is located further toward an insertion direction side than a front end of the pin.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: August 1, 2017
    Assignee: KYOCERA CORPORATION
    Inventors: Takahiro Matsubara, Satoshi Asai, Naoki Takahashi, Kazumi Nakazuru
  • Publication number: 20170207767
    Abstract: An acoustic wave device and an electronic component are disclosed. The acoustic wave device includes a substrate, excitation electrodes on the substrate and a cover. The cover comprises a frame member on the substrate, and a lid member. The frame member surrounds the excitation electrodes and includes an inner wall, top surface and an outer wall. The lid member is disposed on the top surface, and includes first and second surfaces opposite to each other, and a descending part on the second surface. The second surface faces the substrate. The descending part extends downward from the second surface, and covers at least a part of the inner wall or at least a part of the outer wall. The electronic component includes the acoustic wave device on a mounting substrate via an electrically conductive bonding member, and molding resin covering the device.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 20, 2017
    Inventors: Yasutaka Ohashi, Satoshi Asai, Masaru Nagata
  • Publication number: 20170103932
    Abstract: A semiconductor apparatus includes a semiconductor device, on-semiconductor-device metal pad and metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second layer. The metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second layer, penetrates the second layer from its upper surface, and is electrically connected to the through electrode at an lower surface of the second layer, and an under-semiconductor-device metal interconnect is between the first layer and the semiconductor device, and the under-semiconductor-device metal interconnect is electrically connected to the metal interconnect at the lower surface of the second layer.
    Type: Application
    Filed: March 12, 2015
    Publication date: April 13, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Katsuya TAKEMURA, Kyoko SOGA, Satoshi ASAI, Kazunori KONDO, Michihiro SUGO, Hideto KATO
  • Patent number: 9620429
    Abstract: The present invention is a semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first photosensitive insulating layer formed on the semiconductor device, and a second photosensitive insulating layer formed on the first photosensitive insulating layer, in which the first and second photosensitive insulating layers are composed of a photo-curable resin composition containing a silicone polymer compound having an epoxy group-containing repeating unit shown by formula (1) and a phenolic hydroxyl group-containing repeating unit shown by formula (2), a photosensitive acid generator, a solvent, and crosslinking agents.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 11, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Kyoko Soga, Satoshi Asai, Katsuya Takemura
  • Publication number: 20170077043
    Abstract: A semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second insulating layer, wherein the metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second insulating layer, and the metal interconnect penetrates the second insulating layer from its upper surface and is electrically connected to the through electrode at an lower surface of the second insulating layer. This semiconductor apparatus can be easily placed on a circuit board and stacked, and can reduce its warpage even with dense metal interconnects.
    Type: Application
    Filed: March 16, 2015
    Publication date: March 16, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Katsuya TAKEMURA, Kyoko SOGA, Satoshi ASAI, Kazunori KONDO, Michihiro SUGO, Hideto KATO
  • Publication number: 20170038684
    Abstract: A chemically amplified positive resist composition is provided comprising (A) a polymer adapted to tarn soluble in alkaline aqueous solution under the action, of acid, (B) a photoacid generator, (C) a car boxy lie acid, and (D) a benzotriazole compound and/or an imidazole compound. When the resist composition is coated on a copper substrate as a thick film of 5-250 ?m thick and lithographically processed into a pattern, a high resolution is available and the pattern is of rectangular profile.
    Type: Application
    Filed: August 3, 2016
    Publication date: February 9, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yoshinori Hirano, Satoshi Asai, Katsuya Takemura
  • Patent number: 9548437
    Abstract: An acoustic wave device and an electronic component are disclosed. The acoustic wave device includes a substrate, excitation electrodes on the substrate and a cover. The cover comprises a frame member on the substrate, and a lid member. The frame member surrounds the excitation electrodes and includes an inner wall, top surface and an outer wall. The lid member is disposed on the top surface, and includes first and second surfaces opposite to each other, and a descending part on the second surface. The second surface faces the substrate. The descending part extends downward from the second surface, and covers at least a part of the inner wall or at least a part of the outer wall. The electronic component includes the acoustic wave device on a mounting substrate via an electrically conductive bonding member, and molding resin covering the device.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: January 17, 2017
    Assignee: Kyocera Corporation
    Inventors: Yasutaka Ohashi, Satoshi Asai, Masaru Nagata
  • Patent number: D776717
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: January 17, 2017
    Assignee: Sony Corporation
    Inventor: Satoshi Asai
  • Patent number: D786931
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: May 16, 2017
    Assignee: SONY CORPORATION
    Inventors: Satoshi Asai, Yasuyuki Suki
  • Patent number: D789381
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: June 13, 2017
    Assignee: SONY CORPORATION
    Inventors: Mitsuo Okumura, Goro Takaki, Satoshi Akagawa, Nobuki Furue, Satoshi Asai, Hidehiro Komatsu, Koji Arai, Makoto Niijima, Shigeya Yasui, Youko Masubuchi
  • Patent number: D796521
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: September 5, 2017
    Assignee: SONY CORPORATION
    Inventor: Satoshi Asai
  • Patent number: D810780
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: February 20, 2018
    Assignee: SONY CORPORATION
    Inventors: Satoshi Asai, Yasuyuki Suki, Nobuhiro Jogano, Sugiko Nunome, Sho Kobayashi
  • Patent number: D812623
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: March 13, 2018
    Assignee: SONY CORPORATION
    Inventors: Satoshi Asai, Tamao Kawai
  • Patent number: D817979
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: May 15, 2018
    Assignee: SONY CORPORATION
    Inventors: Junichirou Sakata, Satoshi Asai