Patents by Inventor Satoshi Goto

Satoshi Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240014296
    Abstract: In a semiconductor device, plural cells are disposed side by side on a substrate in a first direction. Each of the plural cells includes a bipolar transistor, an emitter electrode contained in a base layer of the bipolar transistor as viewed from above, and a base electrode. The bipolar transistors of the plural cells are connected in parallel with each other. Among the plural cells, the breakdown resistance of at least one second cell, which is other than a first cell disposed at each end, is higher than that of the first cell. It is possible to provide a semiconductor device that can reduce the deterioration of the breakdown resistance when flip-chip mounting is employed, as well as when face-up mounting is employed.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Shigeki KOYA, Masao KONDO, Shaojun MA, Satoshi GOTO, Kenji SASAKI, Takayuki TSUTSUI, Kazuhito NAKAI
  • Patent number: 11811368
    Abstract: A power amplifier circuit includes a first amplification path including a first power amplifier, a second amplification path including a second power amplifier, a first switching circuit configured to electrically connect either the first amplification path or the second amplification path and a first output terminal to each other, a second switching circuit configured to electrically connect an input terminal and any one of a plurality of second output terminals to each other, and a matching circuit configured to electrically connect the first output terminal and the input terminal to each other and achieve impedance matching between the first output terminal and the input terminal.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: November 7, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Goto, Tomoaki Sato, Hisanori Namie
  • Patent number: 11804450
    Abstract: A semiconductor device includes first and second members. In the first member, a first electronic circuit including a semiconductor element is formed. The second member is joined to an area of part of a first surface of the first member, and includes a second electronic circuit including a semiconductor element formed of a semiconductor material different from that of the semiconductor element of the first electronic circuit. An interlayer insulating film covers the second member and an area of the first surface of the first member to which the second member is not joined. An inter-member connection wire on the interlayer insulating film couples the first and second electronic circuits through an opening in the interlayer insulating film. A shield structure including a first metal pattern disposed on the interlayer insulating film shields a shielded circuit, which is part of the first electronic circuit, in terms of radio frequencies.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 31, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Goto, Masayuki Aoike, Mikiko Fukasawa
  • Patent number: 11799503
    Abstract: A semiconductor device including a radio-frequency amplifier circuit and a band selection switch are mounted on or in a module substrate. An output matching circuit includes at least one passive element disposed on or in the module substrate. The output matching circuit is coupled between the radio-frequency amplifier circuit and the band selection switch. The semiconductor device includes a first member having a semiconductor portion made of an elemental semiconductor and a second member joined to the first member in surface contact with the first member. The radio-frequency amplifier circuit including a semiconductor element made of a compound semiconductor is formed at the second member. The semiconductor device is disposed in close proximity to the output matching circuit in plan view. The output matching circuit is disposed in close proximity to the band selection switch.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: October 24, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Goto, Shunji Yoshimi, Mitsunori Samata
  • Publication number: 20230307458
    Abstract: An integrated circuit includes a first base that has at least a part formed of a first semiconductor material and that, in plan view, has a central area and a peripheral area surrounding the central area, and a second base that has at least a part formed of a second semiconductor material different from the first semiconductor material and that includes a power amplifier circuit. In plan view, the second base is overlain by the central area, and does not overlap the peripheral area.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 28, 2023
    Inventors: Motoji TSUDA, Mikiko FUKASAWA, Satoshi GOTO, Shunji YOSHIMI, Toshiki MATSUI
  • Publication number: 20230299804
    Abstract: A radio-frequency module includes a module substrate that has a principal surface, an integrated circuit on the principal surface that includes a power amplifier circuit, and an SMD on the principal surface that includes a circuit device directly connected to the power amplifier circuit. The integrated circuit includes a first base that has at least a part formed of a first semiconductor material, and a second base that has at least a part formed of a second semiconductor material and that includes the power amplifier circuit. The first base has two sides that are opposite each other in plan view. The SMD is closer to one side than the other side in plan view. In plan view, the second base is smaller than the first base and is overlain by the first base at a position closer to the one side than to the other side.
    Type: Application
    Filed: May 25, 2023
    Publication date: September 21, 2023
    Inventors: Motoji TSUDA, Mikiko FUKASAWA, Shunji YOSHIMI, Satoshi GOTO
  • Publication number: 20230299726
    Abstract: A semiconductor device includes first and second members. A second surface of the second member is opposite to a first surface of the first member. A radio-frequency amplifier circuit is included in the second member. The first and second members are bonded to each other by an electrically conductive bonding member between the first and second surfaces. The radio-frequency amplifier circuit includes at least one power stage transistor, an input wire that is connected to the power stage transistor and supplies an input signal to the power stage transistor, and an input-side circuit element that is connected to the input wire and that includes at least one of a passive element, an active element, and an external connection terminal. The bonding member includes a first conductor pattern covering the power stage transistor in plan view. The input-side circuit element is disposed outside the first conductor pattern in plan view.
    Type: Application
    Filed: February 8, 2023
    Publication date: September 21, 2023
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Goto, Masayuki Aoike, Takayuki Tsutsui, Kenji Sasaki
  • Publication number: 20230299061
    Abstract: A radio frequency module includes a module substrate having major surfaces that face each other, a first base part that is at least partially comprised of a first semiconductor material and in which an electronic circuit is formed, a second base part that is at least partially comprised of a second semiconductor material different from the first semiconductor material and in which a power amplifier is formed, and a switch connected to an output terminal of the power amplifier. The first base part is disposed on or over the major surface; the second base part is disposed between the module substrate and the first base part, is joined to the first base part, and is connected to the major surface via an electrode; and the switch is disposed on or over the major surface.
    Type: Application
    Filed: May 25, 2023
    Publication date: September 21, 2023
    Inventors: Yukiya YAMAGUCHI, Takanori UEJIMA, Motoji TSUDA, Yuji TAKEMATSU, Shunji YOSHIMI, Satoshi ARAYASHIKI, Mitsunori SAMATA, Satoshi GOTO, Masayuki AOIKE
  • Patent number: 11757411
    Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: September 12, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Satoshi Arayashiki, Satoshi Goto, Yusuke Tanaka
  • Patent number: 11754384
    Abstract: The present invention addresses the problem of providing a method for measuring axial clearance of a wheel bearing device, with which it is possible to make a high-precision measurement of negative axial clearance. This method comprises: a step (S02) for press-fitting an inner race (4); a first negative axial clearance measurement step (S03); a swaging step (S04); an inner-race press-in amount measurement step (S05); a first inner-race outer-diameter increment measurement step (S06); a second inner-race outer-diameter increment calculation step (S07); an outer-diameter increment difference calculation step (S08); a first axial clearance decrement calculation step (S09); a second axial clearance decrement calculation step (S10); a third axial clearance decrement calculation step (S11); and a second negative axial clearance calculation step (S12).
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: September 12, 2023
    Assignee: NTN CORPORATION
    Inventors: Nobukatsu Uchiyama, Satoshi Goto
  • Patent number: 11757478
    Abstract: A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier; and a first circuit component. The power amplifier includes: a first amplifying circuit element; a second amplifying circuit element; and an output transformer that includes a primary coil and a secondary coil. An end of the primary coil is connected to an output terminal of the first amplifying circuit element. Another end of the primary coil is connected to an output terminal of the second amplifying circuit element. An end of the secondary coil is connected to an output terminal of the power amplifier. The first amplifying circuit element and the second amplifying circuit element are disposed on the first principal surface. The first circuit component is disposed on the second principal surface.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: September 12, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tsuchida, Daerok Oh, Takahiro Katamata, Satoshi Goto, Mitsunori Samata, Yoshiki Yasutomo
  • Publication number: 20230282620
    Abstract: An integrated circuit includes a first base that has at least a part formed of a first semiconductor material and that includes an electric circuit, a second base that has at least a part formed of a second semiconductor material having a thermal conductivity lower than the first semiconductor material and that includes a power amplifier circuit, and a high thermal conductive member that has at least a part formed of a high thermal conductive material having a thermal conductivity higher than the first semiconductor material and that is disposed between the electric circuit and the power amplifier circuit. At least a part of the high thermal conductive member overlaps at least a part of the first base and at least a part of the second base in plan view. The high thermal conductive member is in contact with the first base and the second base.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Yukiya YAMAGUCHI, Takanori UEJIMA, Motoji TSUDA, Yuji TAKEMATSU, Shunji YOSHIMI, Satoshi ARAYASHIKI, Mitsunori SAMATA, Satoshi GOTO, Yutaka SASAKI, Masayuki AOIKE
  • Patent number: 11742337
    Abstract: A radio-frequency module including a module substrate having a first main surface and a second main surface on opposite sides; a low-noise amplifier disposed on the second main surface; and a power amplifier circuit in a Doherty configuration. The power amplifier including a first phase circuit; a second phase circuit; a carrier amplifier disposed on the first main surface and including an input terminal connected to a first end of the first phase circuit and an output terminal connected to a first end of the second phase circuit; and a peaking amplifier disposed on the first main surface and including an input terminal connected to a second end of the first phase circuit and an output terminal connected to a second end of the second phase circuit.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: August 29, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Goto, Kazuhito Nakai
  • Publication number: 20230268643
    Abstract: A radio-frequency module includes a first base made of a first semiconductor material; a second base that is made of a second semiconductor material having a thermal conductivity lower than that of the first semiconductor material and which includes a power amplifier circuit; a third base including a transmission filter circuit; and a module substrate having a main surface on which the first base, the second base, and the third base are arranged. The first base is joined to the main surface via an electrode. The second base is arranged between the module substrate and the first base in a sectional view and is joined to the main surface via an electrode. At least part of the first base is overlapped with at least part of the second base and at least part of the third base in a plan view.
    Type: Application
    Filed: April 27, 2023
    Publication date: August 24, 2023
    Inventors: Takanori UEJIMA, Yuji TAKEMATSU, Yukiya YAMAGUCHI, Shunji YOSHIMI, Satoshi Arayashiki, Mitsunori SAMATA, Satoshi GOTO, Yutaka SASAKI, Masayuki AOIKE
  • Publication number: 20230261170
    Abstract: A producing method and an examining method for a rectangular battery in which an impregnated state of an electrolytic solution impregnated in an electrode body is appropriately examined are provided. A producing method for the rectangular battery includes a step of impregnation examining to determining an impregnated state of the electrolytic solution in the electrode body by holding and pressing a first side wall portion and a second side wall portion of the rectangular battery to bring their inside surfaces into contact with an electrode body, bringing a transmitting probe and a receiving probe into close contact with the first side wall portion and the second side wall portion respectively, and in a state that an absorption member is placed to absorb diffused ultrasonic wave or going-around ultrasonic wave, transmitting the post-penetrated ultrasonic wave to pass through the electrode body and others, and receiving it by the receiving probe.
    Type: Application
    Filed: December 23, 2022
    Publication date: August 17, 2023
    Inventor: Satoshi GOTO
  • Patent number: 11710920
    Abstract: The plug shell of the electrical connector includes the accommodation portion for accommodating the contact pin and the housing that holds the contact pin, the insertion port for inserting the contact pin and the housing into the accommodation portion, the lid member for closing the insertion port, and the hold mechanism for holding the lid member. The hold mechanism includes the pedestal, on which the lid member is placed, and the pair of hold pieces, which hold the lid member on the pedestal by pressing. The pair of hold pieces press the end portions of the lid member toward the pedestal, so that thereby a stress that urges the end portions to become distant from the pedestal is generated in the lid member.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: July 25, 2023
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventors: Takahiro Akaike, Satoshi Goto, Isao Suzuki
  • Publication number: 20230223969
    Abstract: A radio frequency module includes a module substrate including major surfaces that face each other; a first base part that is at least partially comprised of a first semiconductor material and in which an electronic circuit is formed; a second base part that is at least partially comprised of a second semiconductor material having a thermal conductivity lower than the thermal conductivity of the first semiconductor material and in which an amplifier circuit is formed; and an external connection terminal disposed on or over the major surface. The first base part and the second base part are disposed on or over the major surface out of the major surfaces; and the second base part is disposed between the module substrate and the first base part, is joined to the first base part, and is connected to the major surface via an electrode.
    Type: Application
    Filed: March 8, 2023
    Publication date: July 13, 2023
    Inventors: Yukiya YAMAGUCHI, Fumio HARIMA, Takanori UEJIMA, Yuji TAKEMATSU, Shunji YOSHIMI, Satoshi ARAYASHIKI, Mitsunori SAMATA, Satoshi GOTO, Masayuki AOIKE
  • Patent number: 11682504
    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: June 20, 2023
    Assignee: TDK CORPORATION
    Inventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
  • Patent number: 11677367
    Abstract: A power amplifier circuit includes a power splitter, a first amplifier configured to output a first amplified signal from a first output terminal, and a second amplifier configured to output a second amplified signal from a second output terminal. The power amplifier circuit further includes a first termination circuit connected between the first output terminal and the second output terminal, a first transmission line, a second transmission line, a second termination circuit connected between another end of the first transmission line and another end of the second transmission line, and a power combiner.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: June 13, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Satoshi Goto, Fumio Harima
  • Publication number: 20230132964
    Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Satoshi TANAKA, Satoshi ARAYASHIKI, Satoshi GOTO, Yusuke TANAKA