Patents by Inventor Satoshi Miura

Satoshi Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7978443
    Abstract: A TMR element includes a lower magnetic layer, an upper magnetic layer, and a tunnel barrier layer of crystalline insulation material sandwiched between the lower magnetic layer and the upper magnetic layer. The lower magnetic layer includes a first magnetic layer and a second magnetic layer sandwiched between the first magnetic layer and the tunnel barrier layer. The second magnetic layer is formed from a magnetic material containing at least one of Fe, Co and Ni.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: July 12, 2011
    Assignee: TDK Corporation
    Inventors: Satoshi Miura, Takumi Yanagisawa
  • Patent number: 7961441
    Abstract: The exchange coupled film according to the present invention comprises a buffer layer including a laminate in which an amorphous layer and a hafnium layer are laminated in that order, an antiferromagnetic layer laminated on the hafnium layer of the buffer layer via an intermediate layer with a thickness of at least 2 nm, and a pinned magnetic layer laminated on the antiferromagnetic layer.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: June 14, 2011
    Assignee: TDK Corporation
    Inventors: Keita Kawamori, Satoshi Miura, Takumi Yanagisawa
  • Patent number: 7934309
    Abstract: The method of fabricating an exchange-coupling film in accordance with the present invention comprises a multilayer body forming step of forming a multilayer body having an antiferromagnetic layer and a ferromagnetic layer laminated on the antiferromagnetic layer; and an annealing step of annealing the multilayer body in a magnetic field with a maximum temperature higher than a blocking temperature of the multilayer body by 15 to 60° C.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: May 3, 2011
    Assignee: TDK Corporation
    Inventors: Keita Kawamori, Satoshi Miura
  • Publication number: 20110068786
    Abstract: A magnetic sensor includes: a first and a second magnetoresistive elements each including: a magnetization free layer; a nonmagnetic spacing layer; a magnetization pinned layer having one or more first layers of a first group of ferromagnetic layers and one or more second layers of a second group of ferromagnetic layers, in which the first layer and the second layer are stacked alternately with a nonmagnetic coupling layer in between, and so antiferromagnetically coupled to each other as to have opposite magnetizations to each other; and an antiferromagnetic layer pinning magnetization orientation in the one or more first and the second layers. The first layers in the first magnetoresistive element are one more in number than that of the one or more second layers. The number of the one or more first layers and that of the one or more second layers in the second magnetoresistive element are equal.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 24, 2011
    Applicant: TDK CORPORATION
    Inventors: Naoki OHTA, Koichi Terunuma, Satoshi Miura, Masanori Sakai, Hiroshi Yamazaki
  • Publication number: 20110058270
    Abstract: A reproducing method of reproducing magnetic information written in each of bits of a recording medium using a magnetic head having a reading element configured to measure external magnetic field intensity includes moving, measuring and specifying steps. In the moving step, the magnetic head moves to a position where the reading element covers two bits, one bit having known magnetic information, the other bit being adjacent to the one bit and having unknown magnetic information. In the measuring step, the reading element measures magnetic field intensity coming from the recording medium. In the specifying step, magnetic information of the bit having the unknown magnetic information is specified based on the magnetic field intensity measured in the measuring step and magnetic information of the bit having the known magnetic information.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 10, 2011
    Applicant: TDK CORPORATION
    Inventors: Takumi Yanagisawa, Satoshi Miura
  • Patent number: 7871238
    Abstract: A vapor lock in a fuel pump can be prevented by reducing the formation of vapor within the fuel. A first group of concavities may be formed in an inner circumferential region of an intake side face of an impeller, and a second group of concavities may be formed concentrically in a region outside of the first group of concavities. A third group of concavities that communicates with the second group of concavities may be formed in a discharge side face of the impeller. The impeller is housed within a casing. A first groove that faces the first group of concavities and a second groove that faces the second group of concavities may be formed in the face of the casing that faces the intake side face of the impeller. A third groove that faces the third group of concavities may be formed in the face of the casing that faces the discharge side face of the impeller.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: January 18, 2011
    Assignee: Aisan Kogyo Kabushiki Kaisha
    Inventors: Shigeru Yoshida, Satoshi Miura
  • Publication number: 20100266080
    Abstract: Provided are a transmission device, a receiving device, and a communication system having a simple configuration and capable of reliably executing the confirmation of a changed bit rate. The communication system 1 sends, to the receiving device 3, a serial data signal Sdata that is set as a constant value across a period of a constant multiple of a cycle of the clock when a bit rate of a serial data signal Sdata in the transmission device 2 is changed. The receiving device 3 that received the serial data signal Sdata receives training data Tdata from the transmission device 2 when it is determined that the serial data signal Sdata is a constant value across a period of a constant multiple of a cycle of the clock, and proceeds to the processing of confirming the changed bit rate.
    Type: Application
    Filed: October 27, 2009
    Publication date: October 21, 2010
    Applicant: THINE ELECTRONICS, INC.
    Inventors: Hironobu Akita, Seiichi Ozawa, Yohei Ishizone, Satoshi Miura
  • Patent number: 7812645
    Abstract: A signal conversion circuit 2 comprises a differential amplifier portion 10 and a source follower portion 20. When differential voltage signals INp and INn are input to a first input terminal 5 and second input terminal 6 respectively, operations occurs either in a mode in which only the differential amplifier portion 10 operates, or a mode in which both the differential amplifier portion 10 and the source follower portion 20 operate, or a mode in which only the source follower portion 20 operates, according to the levels of the differential voltage signals INp and INn. The differential amplifier portion 10 and source follower portion 20 have fewer components compared with a circuit comprising two differential amplifier circuits. By this means, the circuit area can be reduced, and in addition current consumption can be reduced. Also, because the source follower portion 20 performs non-inverting amplification of the differential voltage signals INp and INn, high-speed operation is possible.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: October 12, 2010
    Assignee: Thine Electronics, Inc.
    Inventors: Satoshi Miura, Makoto Masuda
  • Patent number: 7782576
    Abstract: An exchange-coupling film incorporates an antiferromagnetic layer and a pinned layer. The pinned layer includes a first ferromagnetic layer, a second ferromagnetic layer, a third ferromagnetic layer, a nonmagnetic middle layer, and a fourth ferromagnetic layer that are disposed in this order, the first ferromagnetic layer being closest to the antiferromagnetic layer. The first ferromagnetic layer is made of a ferromagnetic material and has a face-centered cubic structure. The second ferromagnetic layer is made of only iron or an alloy containing x atomic % cobalt and (100?x) atomic % iron, wherein x is greater than zero and smaller than or equal to 60. The third ferromagnetic layer is made of an alloy containing y atomic % cobalt and (100?y) atomic % iron, wherein y is within a range of 65 to 80 inclusive. The antiferromagnetic layer and the first ferromagnetic layer are exchange-coupled to each other. The third and fourth ferromagnetic layers are antiferromagnetically coupled to each other.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: August 24, 2010
    Assignee: TDK Corporation
    Inventors: Takumi Uesugi, Satoshi Miura
  • Publication number: 20100141302
    Abstract: A signal conversion circuit 2 comprises a differential amplifier portion 10 and a source follower portion 20. When differential voltage signals INp and INn are input to a first input terminal 5 and second input terminal 6 respectively, operations occurs either in a mode in which only the differential amplifier portion 10 operates, or a mode in which both the differential amplifier portion 10 and the source follower portion 20 operate, or a mode in which only the source follower portion 20 operates, according to the levels of the differential voltage signals INp and INn. The differential amplifier portion 10 and source follower portion 20 have fewer components compared with a circuit comprising two differential amplifier circuits. By this means, the circuit area can be reduced, and in addition current consumption can be reduced. Also, because the source follower portion 20 performs non-inverting amplification of the differential voltage signals INp and INn, high-speed operation is possible.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Applicant: THINE ELECTRONICS, INC.
    Inventors: Satoshi MIURA, Makoto MASUDA
  • Patent number: 7733128
    Abstract: To provide a transmitting apparatus capable of suppressing the fluctuation of a common mode potential and performing high-speed, long-distance signal transmission. The transmitting apparatus has a main buffer circuit and a pre-emphasis buffer circuit 20. The pre-emphasis buffer circuit 20, which has a switch circuit 21, a first current source 22, and a second current source 23, uses the switch circuit 21 to output a current signal having the same direction as an output current of the main buffer circuit 10 during a certain time interval starting from a time point when the level of data to be transmitted changes, and brings the output terminals 201, 202 to a High-Z state during a time interval when the level is constant after a lapse of the abovementioned certain time interval.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: June 8, 2010
    Assignee: Thine Electronics, Inc.
    Inventor: Satoshi Miura
  • Patent number: 7715156
    Abstract: A TMR element includes a lower electrode layer, a TMR multi-layer stacked on the lower electrode layer, and an upper electrode layer stacked on the TMR multi-layer. The TMR multi-layer includes a tunnel barrier layer having a three-layered structure of a first crystalline layer, a crystalline semiconductor layer and a second crystalline insulation layer stacked in this order.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: May 11, 2010
    Assignee: TDK Corporation
    Inventors: Kei Hirata, Satoshi Miura
  • Patent number: 7692454
    Abstract: A signal conversion circuit 2 comprises a differential amplifier portion 10 and a source follower portion 20. When differential voltage signals INp and INn are input to a first input terminal 5 and second input terminal 6 respectively, operations occurs either in a mode in which only the differential amplifier portion 10 operates, or a mode in which both the differential amplifier portion 10 and the source follower portion 20 operate, or a mode in which only the source follower portion 20 operates, according to the levels of the differential voltage signals INp and INn. The differential amplifier portion 10 and source follower portion 20 have fewer components compared with a circuit comprising two differential amplifier circuits. By this means, the circuit area can be reduced, and in addition current consumption can be reduced. Also, because the source follower portion 20 performs non-inverting amplification of the differential voltage signals INp and INn, high-speed operation is possible.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 6, 2010
    Assignee: Thine Electronics, Inc.
    Inventors: Satoshi Miura, Makoto Masuda
  • Patent number: 7660082
    Abstract: A magneto-resistive element has a lower layer, a tunnel barrier layer, and an upper layer. The lower layer, the tunnel barrier layer, and the upper layer are disposed adjacent to each other and are stacked in this order. A magnetization direction of either of the lower layer and the upper layer is fixed relative to an external magnetic field, and a magnetization direction of the other layer is variable in accordance with the external magnetic field. A crystalline portion and a non-crystalline portion co-exist in a plane that is parallel with a surface of the tunnel barrier layer.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: February 9, 2010
    Assignee: TDK Corporation
    Inventors: Takumi Uesugi, Satoshi Miura, Takeo Kagami
  • Patent number: 7652854
    Abstract: A tunneling magneto-resistive element includes: a tunneling magneto-resistive film including an antiferromagnetic layer, a pinned layer, a barrier layer and a free layer; and a lower magnetic shielding film disposed below the tunneling magneto-resistive film with respect to a lamination direction. The barrier layer is constituted of magnesium oxide. The lower magnetic shielding film has a multi-layer structure including a crystalline layer and an amorphous layer disposed above the crystalline layer with respect to the lamination direction. The crystalline layer contains at least one crystal grain having a grain size of 500 nm or more.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: January 26, 2010
    Assignee: TDK Corporation
    Inventors: Takeo Kagami, Naoki Ohta, Kazuki Sato, Satoshi Miura
  • Publication number: 20090237839
    Abstract: A magnetoresistance effect element comprises: a magnetoresistive stack including: first, second and third magnetic layers whose magnetization directions change in accordance with an external magnetic field, said second magnetic layer being located between said first magnetic layer and the third magnetic layer; a first non-magnetic intermediate layer sandwiched between said first and second magnetic layers, said first non-magnetic intermediate layer allowing said first magnetic layer and said second magnetic layer to be exchange-coupled such that the magnetization directions thereof are anti-parallel to each other when no magnetic field is applied; and a second non-magnetic intermediate layer sandwiched between said second and third magnetic layers, said second non-magnetic intermediate layer producing a magnetoresistance effect between said second magnetic layer and said third magnetic layer; wherein sense current is adapted to flow in a direction perpendicular to a film plane; a bias magnetic layer provided
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: TDK CORPORATION
    Inventors: Kei Hirata, Satoshi Miura, Tomohito Mizuno, Takeo Kagami
  • Publication number: 20090231762
    Abstract: An MR element includes a pinned layer, a free layer and a nonmagnetic space layer or a tunnel barrier layer sandwiched between the pinned layer and the free layer. A magnetization direction of the free layer is substantially perpendicular to a film surface thereof, and a magnetization direction of the pinned layer is substantially parallel to a film surface thereof.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 17, 2009
    Applicant: TDK CORPORATION
    Inventors: Naoki Ohta, Satoshi Miura, Tomohito Mizuno
  • Patent number: 7573686
    Abstract: An MR element comprises: a tunnel barrier layer having two surfaces facing toward opposite directions; a free layer disposed adjacent to one of the surfaces of the tunnel barrier layer and having a direction of magnetization that changes in response to a signal magnetic field; and a pinned layer disposed adjacent to the other of the surfaces of the tunnel barrier layer and having a fixed direction of magnetization. The tunnel barrier layer is made of a material containing an oxide semiconductor such as ZnO. The MR element has a resistance-area product that falls within a range of 0.3 to 2.0 ?-?m2 inclusive.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: August 11, 2009
    Assignee: TDK Corporation
    Inventors: Kei Hirata, Satoshi Miura, Naoki Ota
  • Publication number: 20090191430
    Abstract: The exchange coupled film according to the present invention comprises a buffer layer including a laminate in which an amorphous layer and a hafnium layer are laminated in that order, an antiferromagnetic layer laminated on the hafnium layer of the buffer layer via an intermediate layer with a thickness of at least 2 nm, and a pinned magnetic layer laminated on the antiferromagnetic layer.
    Type: Application
    Filed: January 28, 2008
    Publication date: July 30, 2009
    Applicant: TDK CORPORATION
    Inventors: Keita KAWAMORI, Satoshi MIURA, Takumi YANAGISAWA
  • Publication number: 20090174971
    Abstract: A magnetoresistance effect element comprises: a pair of magnetic layers whose magnetization directions form a relative angle therebetween that is variable depending on an external magnetic field; and a crystalline spacer layer sandwiched between the pair of magnetic layers; wherein sense current may flow in a direction that is perpendicular to a film plane of the pair of magnetic layers and the spacer layer. The spacer layer includes a crystalline oxide, and either or both magnetic layers whose magnetization direction is variable depending on the external magnetic field has a layer configuration in which a CoFeB layer is sandwiched between a CoFe layer and a NiFe layer and is positioned between the spacer layer and the NiFe layer.
    Type: Application
    Filed: January 3, 2008
    Publication date: July 9, 2009
    Inventors: Yoshihiro Tsuchiya, Shinji Hara, Tomohito Mizuno, Satoshi Miura, Takumi Yanagisawa