Patents by Inventor Satoshi Tanaka

Satoshi Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230251582
    Abstract: A measurement apparatus which measures a relative positional displacement amount of a partial pattern to another pattern in a complex pattern on a surface of an object, includes: a measurement part to measure two-dimensional intensity distributions having a first and a second two-dimensional intensity distribution, the first distribution being formed by applying first light having a first shape to a region on which the complex pattern is measured and detecting only zero order diffraction light from the region via a first filter, and the second distribution being formed by applying second light having a second shape to the region and detecting only zero order diffraction light from the region via a second filter; a storage part to store measurement data indicating the distributions; and a calculation part to form a synthesized intensity distribution obtained by the two-dimensional intensity distributions to calculate a positional displacement amount of the partial pattern.
    Type: Application
    Filed: September 9, 2022
    Publication date: August 10, 2023
    Applicant: Kioxia Corporation
    Inventors: Kentaro KASA, Soichi INOUE, Satoshi TANAKA, Hiroyuki TANIZAKI
  • Publication number: 20230253937
    Abstract: Provided are a power amplifier circuit and a communication device that improve a power handling capability required for a filter while increasing output power. A power amplifier circuit includes: an amplifier unit that amplifies an input signal of a time division duplex scheme and outputs a signal to a signal path and a signal to a signal path; a filter that is provided in the signal path and outputs a signal based on the signal; a filter that is provided in the signal path and outputs a signal based on the signal; and a transformer that is connected to the signal path through the filter and connected to the signal path through the filter and outputs an output signal based on the signal and the signal to a signal path.
    Type: Application
    Filed: April 13, 2023
    Publication date: August 10, 2023
    Inventors: Satoshi TANAKA, Seima KONDO, Yasuhisa YAMAMOTO
  • Patent number: 11702621
    Abstract: Provided are a multilayer film having excellent gas permeability and excellent handling properties and hence is suited for forming a cell culture container, and a cell culture container formed by using the same. A multilayer film used for forming a cell culture container, comprising: a base material composed of a polyethylene-based resin having a density of 0.87 g/cm3 to 0.90 g/cm3; and an inner layer composed of a polyethylene-based resin having a density of 0.896 g/cm3 to 0.93 g/cm3 and forming a cell culture icy surface. A cell culture container is formed by using this multilayer film.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: July 18, 2023
    Assignee: TOYO SEIKAN GROUP HOLDINGS, LTD.
    Inventors: Satoshi Tanaka, Takahiko Totani, Yoichi Ishizaki, Kyohei Ota, Ryo Suenaga, Masahiro Kuninori
  • Publication number: 20230216456
    Abstract: A power amplifier circuit includes a power splitter, a first amplifier, a second amplifier, a third amplifier, a fourth amplifier, a first bias circuit, a first line connecting the first bias circuit and the first amplifier, and a second line connecting the first bias circuit and the third amplifier on the same semiconductor substrate, in which the first line and the second line are formed such that a voltage drop amount of the first bias voltage between the first bias circuit and the first amplifier is substantially equal to a voltage drop amount of the first bias voltage between the first bias circuit and the third amplifier.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 6, 2023
    Inventors: Shohei IMAI, Satoshi TANAKA
  • Publication number: 20230208453
    Abstract: A radio-frequency circuit is used in simultaneous transfer of a radio-frequency signal of 4G and a radio-frequency signal of 5G, and includes a first transfer circuit that selectively receives the 4G radio-frequency signal or the 5G radio-frequency signal, and transfers a radio-frequency signal of a first communication band including a first transmission band and a first reception band and a radio-frequency signal of a second communication band including a second transmission band and a second reception band. The first and second transmission bands at least partially overlap. The first transfer circuit includes a first power amplifier that amplifies transmission signals of the first and second communication bands, and a first transmission filter that has a first passband including the first and second transmission bands, and passes the transmission signals of the first and second communication bands output from the first power amplifier.
    Type: Application
    Filed: February 22, 2023
    Publication date: June 29, 2023
    Inventors: Atsushi ONO, Satoshi TANAKA, Hirotsugu MORI
  • Publication number: 20230199671
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 22, 2023
    Inventors: Satoshi TANAKA, Kiichiro TAKENAKA, Takayuki TSUTSUI, Taizo YAMAWAKI, Shun IMAI
  • Publication number: 20230188967
    Abstract: A communication device may include a first type of interface and a second type of interface. The communication device may execute the communication of object data with a mobile device using the second type of interface after executing a specific process for causing the communication device to shift to a communication-enabled state, in a case where it is determined that the communication device is not currently in the communication-enabled state. Also, the communication device may execute the communication of the object data with the mobile device using the second type of interface without executing the specific process, in a case where it is determined that the communication device is currently in the communication-enabled state.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Inventors: Takanobu Suzuki, Hirotaka Asakura, Munehisa Matsuda, Satoshi Tanaka
  • Patent number: 11677358
    Abstract: A power amplifier circuit includes a substrate and a semiconductor chip disposed on or above the substrate. The semiconductor chip includes a power amplifier unit that amplifies an RF signal, a ground terminal to which a ground of the power amplifier unit is coupled, and a first circuit element having a first end electrically coupled to the ground terminal without any portion outside the semiconductor chip interposed therebetween, and having a second end. The substrate includes a second circuit element having a first end electrically coupled to an output of the power amplifier unit and a second end electrically coupled to the second end of the first circuit element. The first and second circuit elements constitute a harmonic wave termination circuit. The harmonic wave termination circuit reflects, to the power amplifier unit, a harmonic wave component of the amplified RF signal output from the power amplifier unit.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: June 13, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masatoshi Hase, Satoshi Tanaka
  • Patent number: 11667559
    Abstract: A method for manufacturing an optical fiber preform including a core part and a cladding part is disclosed. The method includes: adding an alkali metal to an inner surface of a silica-based glass pipe; etching the inner surface of the silica-based glass pipe to which the alkali metal is added; making a glass rod by collapsing the silica-based glass pipe after the etching; and making an optical fiber preform using the glass rod. The silica-based glass pipe is heated in the adding such that a surface temperature of the silica-based glass pipe falls within a temperature range of 1500° C. or higher to lower than 2000° C.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: June 6, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Satoshi Tanaka, Tetsuya Haruna
  • Publication number: 20230167003
    Abstract: A production method and others according to the present embodiment are provided with a structure for effectively preventing occurrence of accidental spiking during drawing of a preform. In order to control the residual He-concentration in the center part of the preform, a transparent glass rod that has a predetermined outer diameter and is already sintered but is not doped with an alkali metal yet is annealed in in the atmosphere not containing He gas for an annealing time determined by referring to result data in which the relationship between the annealing time and the residual He-concentration is previously recorded for each outer diameter. In the result data, actually measured data of the residual He-concentration in a produced optical fiber preform and the annealing time are accumulated as annealing treatment results.
    Type: Application
    Filed: January 24, 2023
    Publication date: June 1, 2023
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takumi YONEMURA, Noboru YAMAZAKI, Satoshi TANAKA
  • Patent number: 11661104
    Abstract: A steering device according to one aspect of the disclosure includes: a speed reducer configured to decelerate a rotational power input from one surface side while increasing a torque and output rotation from an output section disposed on the other surface side; a motor provided on the one surface side and configured to input the rotational power to the speed reducer; and a control device for controlling the motor. The motor includes a rotor for generating the rotational power. The rotor includes a rotor output shaft disposed coaxially with an output axis of the output section. The motor inputs the rotational power from one end side of the rotor output shaft to the speed reducer. The control device is disposed on the other end side of the rotor output shaft coaxially with the rotor output shaft and includes a sensing unit for sensing rotation of the rotor.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: May 30, 2023
    Assignee: NABTESCO CORPORATION
    Inventors: Satoshi Tanaka, Stefan Kubina
  • Patent number: 11658622
    Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Yusuke Tanaka, Satoshi Arayashiki
  • Patent number: 11646704
    Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current by subjecting the first signal to detection. The bias adjustment circuit controls the bias current such that a first current extracted from the bias circuit depends on a magnitude of the first signal.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 9, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takayuki Tsutsui, Masao Kondo, Satoshi Tanaka
  • Publication number: 20230134478
    Abstract: Provided is a cell culture vessel for culturing cells with a high density having excellent gas permeability and strength. A bag-shaped cell culture vessel of a closed system includes at least one port and mutually opposed planar substrates. At least one of the planar substrates is formed of a gas permeable film, the at least one gas permeable film has an outer surface provided with a protruding portion having a shape different from an inner surface shape of the gas permeable film, a culture space for culturing cells is provided in the inner surface side of the gas permeable film, and when the gas permeable film is brought in contact with a planar surface, a space enabling ventilation is formed between the gas permeable film and the planar surface by the protruding portion.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Osamu KOSEKI, Satoshi TANAKA, Takahiko TOTANI, Yosuke MATSUOKA, Takaharu NISHIYAMA
  • Publication number: 20230132964
    Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Satoshi TANAKA, Satoshi ARAYASHIKI, Satoshi GOTO, Yusuke TANAKA
  • Patent number: 11621733
    Abstract: A radio-frequency circuit is used in simultaneous transfer of a radio-frequency signal of 4G and a radio-frequency signal of 5G, and includes a first transfer circuit that selectively receives the 4G radio-frequency signal or the 5G radio-frequency signal, and transfers a radio-frequency signal of a first communication band including a first transmission band and a first reception band and a radio-frequency signal of a second communication band including a second transmission band and a second reception band. The first and second transmission bands at least partially overlap. The first transfer circuit includes a first power amplifier that amplifies transmission signals of the first and second communication bands, and a first transmission filter that has a first passband including the first and second transmission bands, and passes the transmission signals of the first and second communication bands output from the first power amplifier.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 4, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi Ono, Satoshi Tanaka, Hirotsugu Mori
  • Patent number: 11616479
    Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: March 28, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Toshikazu Terashima, Fumio Harima, Makoto Itou, Satoshi Tanaka, Kazuo Watanabe, Satoshi Arayashiki, Chikara Yoshida
  • Publication number: 20230087060
    Abstract: A communication device may execute a wireless communication of object data with a mobile device via a first target network using a second type of interface after executing a sending process of sending a wireless setting, for causing the mobile device to belong to the first target network, to the mobile device using a first type of interface in a case where the communication device is determined as currently belonging to the first target network. The communication device may execute the wireless communication of the object data with the mobile device via a second target network using the second type of interface after executing a specific process of causing both the communication device and the mobile device to belong to the second target network in a case where the communication device is determined as currently not belonging to the target network.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 23, 2023
    Inventors: Takanobu Suzuki, Hirotaka Asakura, Munehisa Matsuda, Satoshi Tanaka
  • Patent number: 11611361
    Abstract: A feed line connects an RFIC and a radiating element. A baseband ground plane (BB ground) is connected to a ground terminal of a BBIC. A radio frequency ground plane (RF ground) is placed in such a manner as to overlap the BB ground. The RF ground serves as a return path of the feed line. A first inter-ground connection circuit connects the BB ground and the RF ground. Furthermore, a second inter-ground connection circuit connects the BB ground and the RF ground. Connecting parts between these grounds and the second inter-ground connection circuit are arranged closer to the edges of these grounds than connecting parts between these grounds and the first inter-ground connection circuit. The connecting part between the ground and the second inter-ground connection circuit is placed on one side of a certain imaginary straight line that passes substantially the geometric center of the ground.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazunari Kawahata, Ryuken Mizunuma, Hideki Ueda, Satoshi Tanaka, Masashi Omuro, Yasuhisa Yamamoto
  • Patent number: 11611942
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: March 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Takayuki Tsutsui, Taizo Yamawaki, Shun Imai