Patents by Inventor Satoshi Teramoto

Satoshi Teramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050162578
    Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.
    Type: Application
    Filed: March 21, 2005
    Publication date: July 28, 2005
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Publication number: 20050151891
    Abstract: The present invention provides an active matrix type display device having a high aperture ratio and a required auxiliary capacitor. A source line and a gate line are overlapped with part of a pixel electrode. This overlapped region functions to be a black matrix. Further, an electrode pattern made of the same material as the pixel electrode is disposed to form the auxiliary capacitor by utilizing the pixel electrode. It allows a required value of auxiliary capacitor to be obtained without dropping the aperture ratio. Also, it allows the electrode pattern to function as a electrically shielding film for suppressing the cross-talk between the source and gate lines and the pixel electrode.
    Type: Application
    Filed: March 3, 2005
    Publication date: July 14, 2005
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20050105039
    Abstract: Techniques for successively fabricating liquid crystal cells at low cost, using two resinous substrates wound on their respective rolls. A color filter and an electrode pattern are formed by printing techniques. Furthermore, an orientation film is printed. These manufacturing steps are carried out successively by rotating various rolls.
    Type: Application
    Filed: December 29, 2004
    Publication date: May 19, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Satoshi Teramoto
  • Publication number: 20050056844
    Abstract: Improved method of heat-treating a glass substrate, especially where the substrate is thermally treated (such as formation of films, growth of films, and oxidation) around or above its strain point. If devices generating heat are formed on the substrate, it dissipates the heat well. An aluminum nitride film is formed on at least one surface of the substrate. This aluminum nitride film acts as a heat sink and prevents local concentration of heat produced by the devices such as TFTs formed on the glass substrate surface.
    Type: Application
    Filed: October 26, 2004
    Publication date: March 17, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Fukada, Mitsunori Sakama, Satoshi Teramoto
  • Publication number: 20050056849
    Abstract: To provide a thin film transistor having a low OFF characteristic and to provide P-channel type and N-channel type thin film transistors where a difference in characteristics of the P-channel type and the N-channel type thin film transistors is corrected, a region 145 having a P-type behavior more potential than that of a drain region 146 is arranged between a channel forming region 134 and the drain region 146 in the P-channel type thin film transistor whereby the P-channel type thin film transistor having the low OFF characteristic can be provided and a low concentration impurity region 136 is arranged between a channel forming region 137 and a drain region 127 in the N-channel type thin film transistor whereby the N-channel type thin film transistor having the low OFF characteristic and where deterioration is restrained can be provided.
    Type: Application
    Filed: October 8, 2004
    Publication date: March 17, 2005
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20050056843
    Abstract: Nickel is selectively held in contact with a particular region of an amorphous silicon film. Crystal growth parallel with a substrate is effected by performing a heat treatment. A thermal oxidation film is formed by performing a heat treatment in an oxidizing atmosphere containing a halogen element. During this step, the crystallinity is improved and the gettering of nickel elements proceeds. A thin-film transistor is formed so that the direction connecting source and drain regions coincides with the above crystal growth direction. As a result, a TFT having superior characteristics such as a mobility larger than 200 cm2/Vs and an S value smaller than 100 mV/dec. can be obtained.
    Type: Application
    Filed: June 1, 2004
    Publication date: March 17, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Patent number: 6867432
    Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface. Hydrogen is introduced into the active layer. A thin film comprising SiOxNy formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiOxNy. Also, a thin film comprising SiOxNy is formed under the active layer. The active layer includes a metal element at a concentration of 1×1015 to 1×1019 cm?3 and hydrogen at a concentration of 2×1019 to 5×1021 cm?3.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: March 15, 2005
    Inventor: Satoshi Teramoto
  • Publication number: 20050045884
    Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.
    Type: Application
    Filed: May 25, 2004
    Publication date: March 3, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Publication number: 20050041005
    Abstract: Regions 106 which can be regarded as being monocrystalline are formed locally by irradiating with laser light, and at least the channel-forming region 112 is constructed using these regions. With thin-film transistors which have such a construction it is possible to obtain characteristics which are similar to those which employ monocrystals. Further, by connecting in parallel a plurality of such thin-film transistors it is possible to obtain characteristics which are effectively equivalent to those of a monocrystalline thin-film transistor in which the channel width has been increased.
    Type: Application
    Filed: August 26, 2004
    Publication date: February 24, 2005
    Applicant: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Publication number: 20050040476
    Abstract: A thin film transistor of the present invention has an active layer including at least source, drain and channel regions formed on an insulating surface. A high resistivity region is formed between the channel region and each of the source and drain regions. A film capable of trapping positive charges therein is provided on at least the high resistivity region so that N-type conductivity is induced in the high resistivity region. Accordingly, the reliability of N-channel type TFT against hot electrons can be improved.
    Type: Application
    Filed: September 8, 2004
    Publication date: February 24, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Satoshi Teramoto
  • Publication number: 20050037554
    Abstract: In a method for manufacturing a crystalline silicon film by utilizing a metal element that accelerates the crystallization of silicon, an adverse influence of this metal element can be suppressed. A semiconductor device manufacturing method is comprised of the steps of: forming an amorphous silicon film on a substrate having an insulating surface; patterning the amorphous silicon film to form a predetermined pattern; holding a metal element that accelerates the crystallization of silicon in such a manner that the metal element is brought into contact with the amorphous silicon film; performing a heating process to crystalize the amorphous silicon film, thereby being converted into a crystalline silicon film; and etching a peripheral portion of the pattern of the crystalline silicon film.
    Type: Application
    Filed: September 22, 2004
    Publication date: February 17, 2005
    Inventors: Hisashi Ohtani, Akiharu Miyanaga, Satoshi Teramoto, Shunpei Yamazaki
  • Publication number: 20050037549
    Abstract: A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidizing the gate contact, covering an exposed surface of the silicon semiconductor with a metal, and irradiating an intense light such as a laser beam to the metal film either from the upper side or from an insulator substrate side to allow the metal coating to react with silicon to obtain a silicide film. The metal silicide layer may be obtained otherwise by tightly adhering a metal coating to the exposed source and drain regions using an insulator formed into an approximately triangular shape, preferably 1 ?m or less in width, and allowing the metal to react with silicon. A high performance TFT can be realized.
    Type: Application
    Filed: September 13, 2004
    Publication date: February 17, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20050032339
    Abstract: There are provided a substrate of a semiconductor device and a fabrication method thereof which allow to suppress impurity from turning around from a glass or quartz substrate in fabrication steps of a TFT. An insulating film is deposited so as to surround the glass substrate by means of reduced pressure thermal CVD. It allows to suppress the impurity from infiltrating from the glass substrate to an active region of the TFT in the later process.
    Type: Application
    Filed: September 8, 2004
    Publication date: February 10, 2005
    Inventors: Setsuo Nakajima, Shunpei Yamazaki, Hisashi Ohtani, Satoshi Teramoto, Toshiji Hamatani
  • Publication number: 20050020002
    Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 27, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Patent number: 6847097
    Abstract: Improved method of heat-treating a glass substrate, especially where the substrate is thermally treated (such as formation of films, growth of films, and oxidation) around or above its strain point If devices generating heat are formed on the substrate, it dissipates the heat well. An aluminum nitride film is formed on at least one surface of the substrate. This aluminum nitride film acts as a heat sink and prevents local concentration of heat produced by the devices such as TFTs formed on the glass substrate surface.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: January 25, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Fukada, Mitsunori Sakama, Satoshi Teramoto
  • Patent number: 6844628
    Abstract: An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm?3 or less, carbon atoms at a concentration of 5×1018 atoms·cm?3 or less, and nitrogen atoms at a concentration of 7×1017 atoms·cm?3 or less; furthermore, a silicon nitride film is formed on the aluminum gate, and an anodic oxide film is formed on the side planes thereof.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: January 18, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Patent number: 6839123
    Abstract: Techniques for successively fabricating liquid crystal cells at low cost, using two resinous substrates wound on their respective rolls. A color filter and an electrode pattern are formed by printing techniques. Furthermore, an orientation film is printed. These manufacturing steps are carried out successively by rotating various rolls.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: January 4, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Satoshi Teramoto
  • Publication number: 20040262606
    Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface. Hydrogen is introduced into The active layer. A thin film comprising SiOxNy is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiOxNy. Also, a thin film comprising SiOxNy is formed under the active layer. The active layer includes a metal element at a concentration of 1×1015 to 1×1019 cm−3 and hydrogen at a concentration of 2×1019 to 5×1021 cm−3.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 30, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Teramoto
  • Patent number: 6835675
    Abstract: A laser-irradiation method which comprises a process for fabricating a semiconductor device, comprising: a first step of forming a thin film amorphous semiconductor on a substrate having an insulating surface; a second step of modifying the thin film amorphous semiconductor into a crystalline thin film semiconductor by irradiating a pulse-type linear light and/or by applying a heat treatment; a third step of implanting an impurity element which imparts a one conductive type to the crystalline thin film semiconductor; and a fourth step of activating the impurity element by irradiating a pulse-type linear light and/or by applying a heat treatment; wherein the peak value, the peak width at half height, and the threshold width of the laser energy in the second and the fourth steps above are each distributed within a range of approximately ±3% of the standard value. Also claimed is a laser irradiation device which realizes the method above.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: December 28, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Naoto Kusumoto, Takeshi Fukunaga, Setsuo Nakajima, Tadayoshi Miyamoto, Atsushi Yoshinouchi
  • Patent number: 6835607
    Abstract: A thin film transistor of the present invention has an active layer including at least source, drain and channel regions formed on an insulating surface. A high resistivity region is formed between the channel region and each of the source and drain regions. A film capable of trapping positive charges therein is provided on at least the high resistivity region so that N-type conductivity is induced in the high resistivity region. Accordingly, the reliability of N-channel type TFT against hot electrons can be improved.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: December 28, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Satoshi Teramoto