Patents by Inventor Satoshi Teramoto

Satoshi Teramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090072235
    Abstract: A display device of the present invention includes a first substrate and a second substrate opposed to each other, a liquid crystal interposed between the first substrate and the second substrate, an active matrix circuit and a driving circuit each comprising a thin film transistor formed over the first substrate, a resin layer formed over the active matrix circuit and the driving circuit, a spacer formed over the active matrix circuit, a sealing material formed over the driving circuit, and a filler included in the sealing material and in contact with the resin layer.
    Type: Application
    Filed: September 30, 2008
    Publication date: March 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
  • Patent number: 7504660
    Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: March 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Publication number: 20090029509
    Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.
    Type: Application
    Filed: September 17, 2008
    Publication date: January 29, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
  • Patent number: 7474376
    Abstract: A display device of the present invention includes a first substrate and a second substrate opposed to each other, a liquid crystal interposed between the first substrate and the second substrate, an active matrix circuit and a driving circuit each comprising a thin film transistor formed over the first substrate, a resin layer formed over the active matrix circuit and the driving circuit, a spacer formed over the active matrix circuit, a sealing material formed over the driving circuit, and a filler included in the sealing material and in contact with the resin layer.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: January 6, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
  • Patent number: 7468526
    Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: December 23, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Publication number: 20080309585
    Abstract: A method of manufacturing a semiconductor device, comprises the steeps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.
    Type: Application
    Filed: July 16, 2008
    Publication date: December 18, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Patent number: 7462519
    Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: December 9, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Patent number: 7456056
    Abstract: A novel and very useful method for forming a crystal silicon film by introducing a metal element which promotes crystallization of silicon to an amorphous silicon film and for eliminating or reducing the metal element existing within the crystal silicon film thus obtained is provided. The method for fabricating a semiconductor device comprises steps of intentionally introducing the metal element which promotes crystallization of silicon to the amorphous silicon film and crystallizing the amorphous silicon film by a first heat treatment to obtain the crystal silicon film; eliminating or reducing the metal element existing within the crystal silicon film by implementing a second heat treatment within an oxidizing atmosphere; eliminating a thermal oxide film formed in the previous step; and forming another thermal oxide film on the surface of the region from which the thermal oxide film has been eliminated by implementing another thermal oxidation.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: November 25, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Patent number: 7452794
    Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: November 18, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
  • Publication number: 20080277281
    Abstract: A sensor control device for controlling a current application state of a gas sensor element when measuring a specific gas component concentration in a gas to be measured using the gas sensor element, which sensor control device includes: at least one cell having a solid electrolyte body and a pair of electrodes; a sensor heating unit as defined herein; an oxygen reference pole generating unit as defined herein; a damage avoidance time elapse determining unit as defined herein; and a reference generation current application permitting unit as defined herein.
    Type: Application
    Filed: May 6, 2008
    Publication date: November 13, 2008
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Masamichi HIRAIWA, Nobuhiro INOUE, Satoshi TERAMOTO, Yukinobu NAGAO
  • Patent number: 7446392
    Abstract: An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm?3 or less, carbon atoms at a concentration of 5×1018 atoms·cm?3 or less, and nitrogen atoms at a concentration of 7×1017 atoms·cm?3 or less; furthermore, a silicon nitride film is formed on the aluminum gate, and an anodic oxide film is formed on the side planes thereof.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: November 4, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Patent number: 7427780
    Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: September 23, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
  • Patent number: 7425999
    Abstract: To suppress the occurrence of a failure caused by static electricity in the manufacturing process of an active matrix type display device in which an active matrix circuit and peripheral drive circuits are integrated on a glass substrate, a protective capacitor to be connected to a short ring is formed using a semiconductor layer made from the same material as the active layer of a thin film transistor present under the short ring. This protective capacitor has a function to absorb an electric pulse generated in the plasma using process. Discharge patterns are provided to prevent an electric pulse from affecting each circuit.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: September 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Patent number: 7425931
    Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: September 16, 2008
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Patent number: 7422630
    Abstract: Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel to an amorphous silicon film 103. Then, laser light is irradiated to diffuse the nickel element concentrated locally. After that, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. A thermal oxide film 106 is formed in this step. At this time, the nickel element is gettered to the thermal oxide film 106. Then, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: September 9, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame
  • Patent number: 7375782
    Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: May 20, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Patent number: 7371620
    Abstract: There is provided an improvement on homogeneity of annealing performed utilizing radiation of a laser beam on a silicon film having a large area. In a configuration wherein a linear laser beam is applied to a surface to be irradiated, optimization is carried out on the width and number of cylindrical lenses forming homogenizers 103 and 104 for controlling the distribution of radiation energy density in the longitudinal direction of the linear beam. For example, the width of the cylindrical lenses forming the homogenizers 103 and 104 is set in the range from 0.1 mm to 5 mm, and the number of the lenses is chosen such that one lens is provided for every 5 mm-15 mm along the length of the linear laser beam in the longitudinal direction thereof. This makes it possible to improve homogeneity of the radiation energy density of the linear laser in the longitudinal direction thereof.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: May 13, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Naoto Kusumoto, Koichiro Tanaka
  • Patent number: 7361519
    Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: April 22, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
  • Publication number: 20080075887
    Abstract: An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm?3 or less, carbon atoms at a concentration of 5×1018 atoms·cm?3 or less, and nitrogen atoms at a concentration of 7×1017 atoms·cm?3 or less; furthermore, a silicon nitride film is formed on the aluminum gate, and an anodic oxide film is formed on the side planes thereof.
    Type: Application
    Filed: November 19, 2007
    Publication date: March 27, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Publication number: 20080061299
    Abstract: A thin film transistor of the present invention has an active layer including at least source, drain and channel regions formed on an insulating surface. A high resistivity region is formed between the channel region and each of the source and drain regions. A film capable of trapping positive charges therein is provided on at least the high resistivity region so that N-type conductivity is induced in the high resistivity region. Accordingly, the reliability of N-channel type TFT against hot electrons can be improved.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Satoshi Teramoto