Patents by Inventor Saurabh Chopra
Saurabh Chopra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20210010160Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: September 29, 2020Publication date: January 14, 2021Inventors: Christopher S. OLSEN, Theresa Kramer GUARINI, Jeffrey A. TOBIN, Lara HAWRYLCHAK, Peter STONE, Chi Wei LO, Saurabh CHOPRA
-
Patent number: 10837122Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: GrantFiled: August 26, 2019Date of Patent: November 17, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Christopher S. Olsen, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
-
Publication number: 20200283896Abstract: Methods for forming silicide materials and source/drain devices are provided. The methods and devices can include methods for forming silicide films, including metal silicide and metal germanide silicide films, on germanium-containing film, such as used as a pMOS layer in a source/drain contact region. In one or more embodiments, a method of processing a substrate includes positioning the substrate within a processing chamber, where the substrate contains one or more germanium-containing films, heating the substrate to a temperature of about 100° C. to about 600° C., and exposing the substrate to one or more metal precursors and one or more silicon precursors during a vapor deposition process and forming a silicide film on the germanium-containing film, where the silicide film has a conformality of about 1% to about 50% of an average thickness of the silicide film.Type: ApplicationFiled: February 7, 2020Publication date: September 10, 2020Inventors: Xuebin LI, Errol Antonio C. SANCHEZ, Saurabh CHOPRA
-
Publication number: 20200258997Abstract: The present disclosure generally relates to methods for forming a semiconductor device, a semiconductor device, and a processing chamber. The method includes forming a source/drain region in a processing system, forming a doped semiconductor layer on the source/drain region in the processing system, forming a metal silicide layer, forming a dielectric material, forming a trench in the dielectric material, and filling the trench with a conductor. The source/drain region, the doped semiconductor layer, and the metal silicide layer are formed without breaking vacuum. A semiconductor device includes a plurality of layers, and the semiconductor device has reduced contact resistance. A processing system is configured to perform the method and form the semiconductor device.Type: ApplicationFiled: January 27, 2020Publication date: August 13, 2020Inventors: Gaurav THAREJA, Xuebin LI, Abhishek DUBE, Yi-Chiau HUANG, Andy LO, Patricia M. LIU, Sanjay NATARAJAN, Saurabh CHOPRA
-
Publication number: 20200203490Abstract: Implementations of the present disclosure generally relate to methods for forming a transistor. More specifically, implementations described herein generally relate to methods for forming a source/drain contact. In one implementation, the method includes forming a trench in a dielectric material to expose a source/drain region of a transistor, performing a pre-clean process on the exposed source/drain region, forming a doped semiconductor layer on the source/drain region by an epitaxial deposition process, and fill the trench with a conductor. The doped semiconductor layer has a lower electrical resistance than the source/drain region due to a higher dopant concentration in the doped semiconductor layer. As a result, the contact resistance of the source/drain contact is reduced.Type: ApplicationFiled: November 8, 2019Publication date: June 25, 2020Inventors: Gaurav THAREJA, Xuebin LI, Abhishek DUBE, Yi-Chiau HUANG, Tushar Vidyadhar MANDREKAR, Andy LO, Patricia M. LIU, Sanjay NATARAJAN, Saurabh CHOPRA
-
Publication number: 20190382917Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: August 26, 2019Publication date: December 19, 2019Inventors: Christopher S. OLSEN, Theresa K. GUARINI, Jeffrey TOBIN, Lara HAWRYLCHAK, Peter STONE, Chi Wei LO, Saurabh CHOPRA
-
Patent number: 10446392Abstract: A method of forming a 3D NAND structure having self-aligned nanodots includes depositing alternating layers of an oxide and a nitride on a substrate; at least partially recessing the nitride layers; and forming SiGe nanodots on the nitride layers. A method of forming a 3D NAND structure having self-aligned nanodots includes depositing alternating layers of an oxide and a nitride on a substrate; at least partially recessing the nitride layers; and forming SiGe nanodots on the nitride layers by a process including maintaining a temperature of the substrate below about 560° C.; flowing a silicon epitaxy precursor into the chamber; forming a silicon epitaxial layer on the substrate at the nitride layers; flowing germanium gas into the chamber with the silicon epitaxy precursor; and forming a silicon germanium epitaxial layer on the substrate at the nitride layers.Type: GrantFiled: January 26, 2018Date of Patent: October 15, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Sungwon Jun, Saurabh Chopra, Thomas Jongwan Kwon, Er-Xuan Ping
-
Patent number: 10428441Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: GrantFiled: June 19, 2017Date of Patent: October 1, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Christopher S. Olsen, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
-
Publication number: 20180233359Abstract: A method of forming a 3D NAND structure having self-aligned nanodots includes depositing alternating layers of an oxide and a nitride on a substrate; at least partially recessing the nitride layers; and forming SiGe nanodots on the nitride layers. A method of forming a 3D NAND structure having self-aligned nanodots includes depositing alternating layers of an oxide and a nitride on a substrate; at least partially recessing the nitride layers; and forming SiGe nanodots on the nitride layers by a process including maintaining a temperature of the substrate below about 560° C.; flowing a silicon epitaxy precursor into the chamber; forming a silicon epitaxial layer on the substrate at the nitride layers; flowing germanium gas into the chamber with the silicon epitaxy precursor; and forming a silicon germanium epitaxial layer on the substrate at the nitride layers.Type: ApplicationFiled: January 26, 2018Publication date: August 16, 2018Inventors: Sungwon JUN, Saurabh CHOPRA, Thomas Jongwan KWON, Er-Xuan PING
-
Publication number: 20180016705Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: June 19, 2017Publication date: January 18, 2018Inventors: Christopher S. OLSEN, Theresa K. GUARINI, Jeffrey TOBIN, Lara HAWRYLCHAK, Peter STONE, Chi Wei LO, Saurabh CHOPRA
-
Patent number: 9683308Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: GrantFiled: July 22, 2014Date of Patent: June 20, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Christopher S. Olsen, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
-
Patent number: 9460918Abstract: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.Type: GrantFiled: December 18, 2013Date of Patent: October 4, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Zhiyuan Ye, Xuebin Li, Saurabh Chopra, Yihwan Kim
-
Publication number: 20150221730Abstract: Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device.Type: ApplicationFiled: April 16, 2015Publication date: August 6, 2015Inventors: Zhiyuan YE, Xuebin LI, Saurabh CHOPRA, Yihwan KIM
-
Patent number: 9012328Abstract: Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device.Type: GrantFiled: July 28, 2011Date of Patent: April 21, 2015Assignee: Applied Materials, Inc.Inventors: Zhiyuan Ye, Xuebin Li, Saurabh Chopra, Yihwan Kim
-
Publication number: 20150040822Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: July 22, 2014Publication date: February 12, 2015Inventors: Christopher S. OLSEN, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
-
Publication number: 20140106547Abstract: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.Type: ApplicationFiled: December 18, 2013Publication date: April 17, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Zhiyuan YE, Xuebin LI, Saurabh CHOPRA, Yihwan KIM
-
Patent number: 8652945Abstract: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.Type: GrantFiled: July 28, 2011Date of Patent: February 18, 2014Assignee: Applied Materials, Inc.Inventors: Zhiyuan Ye, Xuebin Li, Saurabh Chopra, Yihwan Kim
-
Publication number: 20120202338Abstract: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.Type: ApplicationFiled: July 28, 2011Publication date: August 9, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Zhiyuan Ye, Xuebin Li, Saurabh Chopra, Yihwan Kim
-
Publication number: 20120193623Abstract: Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device.Type: ApplicationFiled: July 28, 2011Publication date: August 2, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Zhiyuan Ye, Xuebin Li, Saurabh Chopra, Yihwan Kim
-
Patent number: 8207023Abstract: Methods for selectively depositing an epitaxial layer are provided herein. In some embodiments, providing a substrate having a monocrystalline first surface and a non-monocrystalline second surface; exposing the substrate to a deposition gas to deposit a layer on the first and second surfaces, the layer comprising a first portion deposited on the first surfaces and a second portion deposited on the second surfaces; and exposing the substrate to an etching gas comprising a first gas comprising hydrogen and a halogen and a second gas comprising at least one of a Group III, IV, or V element to selectively etch the first portion of the layer at a slower rate than the second portion of the layer. In some embodiments, the etching gas comprises hydrogen chloride (HCl) and germane (GeH4).Type: GrantFiled: August 3, 2010Date of Patent: June 26, 2012Assignee: Applied Materials, Inc.Inventors: Zhiyuan Ye, Saurabh Chopra, Yihwan Kim