Patents by Inventor Saurabh Chopra

Saurabh Chopra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110277934
    Abstract: Apparatus for selectively depositing an epitaxial layer are provided herein. In some embodiments, an apparatus for processing a substrate may include a process chamber having a substrate support disposed therein; a deposition gas source coupled to the process chamber; an etching gas source coupled to the process chamber, the etching gas source including a hydrogen and halogen gas source and a germanium gas source; an energy control source to maintain the substrate at a temperature at up to 600 degrees Celsius; and an exhaust system coupled to the process chamber to control the pressure in the process chamber.
    Type: Application
    Filed: July 26, 2011
    Publication date: November 17, 2011
    Inventors: Zhiyuan Ye, Saurabh Chopra, Yihwan Kim
  • Patent number: 7960236
    Abstract: Methods for formation of epitaxial layers containing n-doped silicon are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source. An epitaxial layer may have considerable tensile stress which may be created in a significant amount by a high concentration of n-dopant. A layer having n-dopant may also have substitutional carbon. Phosphorus as an n-dopant with a high concentration is provided. A substrate having an epitaxial layer with a high level of n-dopant is also disclosed.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: June 14, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Saurabh Chopra, Zhiyuan Ye, Yihwan Kim
  • Publication number: 20110124169
    Abstract: Methods for selectively depositing an epitaxial layer are provided herein. In some embodiments, providing a substrate having a monocrystalline first surface and a non-monocrystalline second surface; exposing the substrate to a deposition gas to deposit a layer on the first and second surfaces, the layer comprising a first portion deposited on the first surfaces and a second portion deposited on the second surfaces; and exposing the substrate to an etching gas comprising a first gas comprising hydrogen and a halogen and a second gas comprising at least one of a Group III, IV, or V element to selectively etch the first portion of the layer at a slower rate than the second portion of the layer. In some embodiments, the etching gas comprises hydrogen chloride (HCl) and germane (GeH4).
    Type: Application
    Filed: August 3, 2010
    Publication date: May 26, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: ZHIYUAN YE, SAURABH CHOPRA, YIHWAN KIM
  • Patent number: 7776698
    Abstract: Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: August 17, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Zhiyuan Ye, Saurabh Chopra, Andrew Lam, Yihwan Kim
  • Patent number: 7772074
    Abstract: Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: August 10, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Zhiyuan Ye, Andrew Lam, Saurabh Chopra, Yihwan Kim
  • Publication number: 20090104739
    Abstract: Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.
    Type: Application
    Filed: October 18, 2007
    Publication date: April 23, 2009
    Inventors: Zhiyuan Ye, Andrew Lam, Saurabh Chopra, Yihwan Kim
  • Publication number: 20090093094
    Abstract: Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.
    Type: Application
    Filed: October 5, 2007
    Publication date: April 9, 2009
    Inventors: Zhiyuan Ye, Saurabh Chopra, Andrew Lam, Yihwan Kim
  • Publication number: 20080182075
    Abstract: Methods for formation of epitaxial layers containing n-doped silicon are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source. An epitaxial layer may have considerable tensile stress which may be created in a significant amount by a high concentration of n-dopant. A layer having n-dopant may also have substitutional carbon. Phosphorus as an n-dopant with a high concentration is provided. A substrate having an epitaxial layer with a high level of n-dopant is also disclosed.
    Type: Application
    Filed: December 17, 2007
    Publication date: July 31, 2008
    Inventors: Saurabh Chopra, Zhiyuan Ye, Yihwan Kim
  • Patent number: 7211458
    Abstract: A method of fabricating a semiconductor device includes forming a strained first semiconductor layer on an insulating layer that is between second semiconductor layers. The strained first semiconductor layer may be epitaxially grown from the second semiconductor layers to extend onto the insulating layer between the second semiconductor layers. The second semiconductor layers have a lattice constant that is different than that of the first semiconductor layer, such that strain may be created in the first semiconductor layer. Related devices are also discussed.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: May 1, 2007
    Assignee: North Carolina State University
    Inventors: Mehmet Ozturk, Veena Misra, Saurabh Chopra
  • Publication number: 20070029553
    Abstract: A method of fabricating a semiconductor device includes forming a strained first semiconductor layer on an insulating layer that is between second semiconductor layers. The strained first semiconductor layer may be epitaxially grown from the second semiconductor layers to extend onto the insulating layer between the second semiconductor layers. The second semiconductor layers have a lattice constant that is different than that of the first semiconductor layer, such that strain may be created in the first semiconductor layer. Related devices are also discussed.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Inventors: Mehmet Ozturk, Veena Misra, Saurabh Chopra
  • Patent number: 6997039
    Abstract: Disclosed are resonant gas sensors and methods for forming and using the disclosed sensors. The sensors include a resonator including a layer comprising adsorptive nanostructures, for example carbon nanotubes, activated carbon fibers, or adsorptive nanowires. The dielectric of the resonator is in electrical communication with the layer comprising adsorptive nanostructures such that the effective resonant frequency of the resonator depends on both the dielectric constant of the dielectric as well as the dielectric constant of the adsorptive layer. In some embodiments, the nanostructures can be degassed. The sensors can detect the presence of polar gases, non-polar gases, organic vapors, and mixtures of materials with both high sensitivity and high selectivity.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: February 14, 2006
    Assignee: Clemson University
    Inventors: Apparao M. Rao, Saurabh Chopra
  • Publication number: 20050183492
    Abstract: Disclosed are resonant gas sensors and methods for forming and using the disclosed sensors. The sensors include a resonator including a layer comprising adsorptive nanostructures, for example carbon nanotubes, activated carbon fibers, or adsorptive nanowires. The dielectric of the resonator is in electrical communication with the layer comprising adsorptive nanostructures such that the effective resonant frequency of the resonator depends on both the dielectric constant of the dielectric as well as the dielectric constant of the adsorptive layer. In some embodiments, the nanostructures can be degassed. The sensors can detect the presence of polar gases, non-polar gases, organic vapors, and mixtures of materials with both high sensitivity and high selectivity.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Inventors: Apparao Rao, Saurabh Chopra