Patents by Inventor Saurabh Singh

Saurabh Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11411191
    Abstract: Selenium-fullerene heterojunction solar cells and techniques for fabrication thereof are provided. In one aspect, a method of forming a solar cell includes: forming a front contact on a substrate; depositing an n-type semiconducting layer on the front contact, wherein the n-type semiconducting layer comprises a fullerene or fullerene derivative; forming a p-type chalcogen absorber layer on the n-type semiconducting layer; depositing a high workfunction material onto the p-type chalcogen absorber layer, wherein the high workfunction material has a workfunction of greater than about 5.2 electron volts; and forming a back contact on the high workfunction material. Solar cells and other methods for formation thereof are also provided.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: August 9, 2022
    Assignee: International Business Machines Corporation
    Inventors: Douglas M. Bishop, Yun Seog Lee, Saurabh Singh, Teodor K. Todorov
  • Patent number: 11354822
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for image compression and reconstruction. A request to generate an encoded representation of an input image is received. The encoded representation of the input image is then generated. The encoded representation includes a respective set of binary codes at each iteration. Generating the set of binary codes for the iteration from an initial set of binary includes: for any tiles that have already been masked off during any previous iteration, masking off the tile. For any tiles that have not yet been masked off during any of the previous iterations, a determination is made as to whether a reconstruction error of the tile when reconstructed from binary codes at the previous iterations satisfies an error threshold. When the reconstruction quality satisfies the error threshold, the tile is masked off.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: June 7, 2022
    Assignee: Google LLC
    Inventors: Michele Covell, Damien Vincent, David Charles Minnen, Saurabh Singh, Sung Jin Hwang, Nicholas Johnston, Joel Eric Shor, George Dan Toderici
  • Publication number: 20220138991
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for compressing and decompressing data. In one aspect, a method comprises: processing data using an encoder neural network to generate a latent representation of the data; processing the latent representation of the data using a hyper-encoder neural network to generate a latent representation of an entropy model; generating an entropy encoded representation of the latent representation of the entropy model; generating an entropy encoded representation of the latent representation of the data using the latent representation of the entropy model; and determining a compressed representation of the data from the entropy encoded representations of: (i) the latent representation of the data and (ii) the latent representation of the entropy model used to entropy encode the latent representation of the data.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Inventors: David Charles Minnen, Saurabh Singh, Johannes Balle, Troy Chinen, Sung Jin Hwang, Nicholas Johnston, George Dan Toderici
  • Patent number: 11316523
    Abstract: A system may include a digitally-controlled oscillator configured to generate an output clock signal based on a control signal received at an input of the digitally-controlled oscillator and a control circuit configured to calculate an error signal between the output clock signal and an external reference clock signal, filter the error signal to generate a correction signal, generate the control signal based on the correction signal, and switch between a first mode of operation and a second mode of operation without artifacts on the correction signal during switching between the first mode and the second mode.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 26, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Saurabh Singh, Jaimin Mehta, Sriram Balasubramanian, Anindya Bhattacharya
  • Patent number: 11302967
    Abstract: Low-voltage rechargeable microbatteries are provided. In one aspect, a method of forming a microbattery includes: forming a cathode on a substrate, wherein the cathode includes a lithium intercalated material; forming a solid electrolyte on the cathode; forming an anode on the solid electrolyte; and forming a negative contact on the anode. A microbattery is also provided.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: April 12, 2022
    Assignee: International Business Machines Corporation
    Inventors: Kevin W. Brew, Oki Gunawan, Saurabh Singh, Teodor K. Todorov
  • Publication number: 20220084255
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for channel-wise autoregressive entropy models. In one aspect, a method includes processing data using a first encoder neural network to generate a latent representation of the data. The latent representation of data is processed by a quantizer and a second encoder neural network to generate a quantized latent representation of data and a latent representation of an entropy model. The latent representation of data is further processed into a plurality of slices of quantized latent representations of data wherein the slices are arranged in an ordinal sequence. A hyperprior processing network generates a hyperprior parameters and a compressed representation of the hyperprior parameters. For each slice, a corresponding compressed representation is generated using a corresponding slice processing network wherein a combination of the compressed representations form a compressed representation of the data.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 17, 2022
    Inventors: David Charles Minnen, Saurabh Singh
  • Patent number: 11257254
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for compressing and decompressing data. In one aspect, a method comprises: processing data using an encoder neural network to generate a latent representation of the data; processing the latent representation of the data using a hyper-encoder neural network to generate a latent representation of an entropy model; generating an entropy encoded representation of the latent representation of the entropy model; generating an entropy encoded representation of the latent representation of the data using the latent representation of the entropy model; and determining a compressed representation of the data from the entropy encoded representations of: (i) the latent representation of the data and (ii) the latent representation of the entropy model used to entropy encode the latent representation of the data.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: February 22, 2022
    Assignee: Google LLC
    Inventors: David Charles Minnen, Saurabh Singh, Johannes Balle, Troy Chinen, Sung Jin Hwang, Nicholas Johnston, George Dan Toderici
  • Patent number: 11250595
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for image compression and reconstruction. An image encoder system receives a request to generate an encoded representation of an input image that has been partitioned into a plurality of tiles and generates the encoded representation of the input image. To generate the encoded representation, the system processes a context for each tile using a spatial context prediction neural network that has been trained to process context for an input tile and generate an output tile that is a prediction of the input tile. The system determines a residual image between the particular tile and the output tile generated by the spatial context prediction neural network by process the context for the particular tile and generates a set of binary codes for the particular tile by encoding the residual image using an encoder neural network.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: February 15, 2022
    Assignee: Google LLC
    Inventors: Michele Covell, Damien Vincent, David Charles Minnen, Saurabh Singh, Sung Jin Hwang, Nicholas Johnston, Joel Eric Shor, George Dan Toderici
  • Patent number: 11223368
    Abstract: A switched-capacitor delta-sigma data converter circuit includes compensation for voltage reference error that may cause non-linearity and inter-channel crosstalk. The circuit includes a voltage reference circuit, an integrator, a quantizer that quantizes the output of the integrator and a reference feedback switched-capacitor network that provides feedback charge quanta to the integrator that represents an output of the quantizer, so that the output of the quantizer, on average, represents an input signal provided to the integrator. In addition, a compensation switched-capacitor network is included for drawing dummy load charge quanta from the voltage reference output that is not provided to the integrator so that a total charge drawn from the voltage reference output when the reference feedback switched-capacitor network is coupled to the voltage reference output does not vary as the input voltage varies.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: January 11, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Chandra Prakash, Saurabh Singh
  • Patent number: 11177823
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for compressing and decompressing data. In one aspect, an encoder neural network processes data to generate an output including a representation of the data as an ordered collection of code symbols. The ordered collection of code symbols is entropy encoded using one or more code symbol probability distributions. A compressed representation of the data is determined based on the entropy encoded representation of the collection of code symbols and data indicating the code symbol probability distributions used to entropy encode the collection of code symbols. In another aspect, a compressed representation of the data is decoded to determine the collection of code symbols representing the data. A reconstruction of the data is determined by processing the collection of code symbols by a decoder neural network.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: November 16, 2021
    Assignee: Google LLC
    Inventors: David Charles Minnen, Michele Covell, Saurabh Singh, Sung Jin Hwang, George Dan Toderici
  • Publication number: 20210351753
    Abstract: The present disclosure relates to circuitry for providing an output voltage. The circuitry comprises: voltage generator circuitry configured to provide an output voltage to an output node of the circuitry; current limiter circuitry operable to perform current limiting so as to limit a current supplied at the output node of the circuitry; detection circuitry configured to output a detection signal when a load voltage across a load coupled to the output node of the circuitry reaches a target voltage; and delay circuitry configured to receive the detection signal and to output a control signal to deactivate current limiting by the current limiter circuitry after a predetermined delay period after receiving the detection signal.
    Type: Application
    Filed: April 19, 2021
    Publication date: November 11, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John B. BOWLERWELL, Andrew J. HOWLETT, Saurabh SINGH, Andrew BUIST
  • Publication number: 20210335017
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for image compression and reconstruction. A request to generate an encoded representation of an input image is received. The encoded representation of the input image is then generated. The encoded representation includes a respective set of binary codes at each iteration. Generating the set of binary codes for the iteration from an initial set of binary includes: for any tiles that have already been masked off during any previous iteration, masking off the tile. For any tiles that have not yet been masked off during any of the previous iterations, a determination is made as to whether a reconstruction error of the tile when reconstructed from binary codes at the previous iterations satisfies an error threshold. When the reconstruction quality satisfies the error threshold, the tile is masked off.
    Type: Application
    Filed: May 16, 2018
    Publication date: October 28, 2021
    Inventors: Michele Covell, Damien Vincent, David Charles Minnen, Saurabh Singh, Sung Jin Hwang, Nicholas Johnston, Joel Eric Shor, George Dan Toderici
  • Patent number: 11115046
    Abstract: A system may include an output stage for driving a load at an output of the output stage, a pulse-width modulation mode path configured to pre-drive the output stage in a first mode of operation, a linear mode path configured to pre-drive the output stage in a second mode of operation and a loop filter coupled at its input to the output of the output stage and coupled at its output to both of the pulse-width modulation mode path and the linear mode path. The pulse-width modulation mode path and the linear mode path may be configured such that a first transfer function between the output of the loop filter and the output of the output stage is substantially equivalent to a second transfer function between the output of the loop filter and the output of the output stage.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: September 7, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Vamsikrishna Parupalli, Mark May, Saurabh Singh, Ramya Balasundaram, Mengde Wang, Eric B. Smith
  • Patent number: 11070177
    Abstract: A system may include an output stage comprising a single-ended driver for driving a load at an output of the output stage, a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load, and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: July 20, 2021
    Assignee: Cirrus Logic, inc.
    Inventors: Saurabh Singh, Vamsikrishna Parupalli, Stewart Kenly, Eric B. Smith
  • Publication number: 20210219396
    Abstract: The present disclosure relates to current control circuitry for controlling a current through a load. The current control circuitry comprises amplifier circuitry, reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry and an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; and a current output terminal. The current control circuitry further comprises a variable resistance coupled to the current output terminal of the output stage, and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.
    Type: Application
    Filed: December 16, 2020
    Publication date: July 15, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Dave SMITH, Saurabh SINGH, Andrew BUIST, Paulius CEREBIEJUS, Mark J. MCCLOY-STEVENS, Terence A. ORR
  • Patent number: 11063750
    Abstract: Systems and methods for secured access to cloud-based applications or services include a service node that may receive a request from client including a URL associated with an application manager. The service node may send a URL prefix identifying a termination to the termination node. The service node may receive a client hello message from the client that includes a first field incorporating the URL prefix, and may send the client hello message to the termination node to initiate a handshake with the client using a wildcard certificate of server, for establishing a SSL channel between the client and the termination node for a session of the application. The service node can direct a communication of the session from the client to the predetermined termination node, for decryption, using the established SSL channel, according to the URL prefix incorporated in a server name indication (SNI) field of the communication.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: July 13, 2021
    Assignee: Citrix Systems, Inc.
    Inventors: Keyoor Khristi, Mukul Agarwal, Ravi Ganesh, V, Saurabh Singh, Vishnu Prateek
  • Patent number: 11047049
    Abstract: Low temperature techniques for forming layered lithium cobalt oxide (LCO) are provided. In one aspect, a method of synthesizing layered LCO includes: forming a metal catalyst layer (e.g., platinum) on a substrate; depositing LCO onto the metal catalyst layer; and annealing the LCO under conditions sufficient to form the layered LCO on the metal catalyst layer. An adhesion layer can be deposited on the substrate, and the metal catalyst layer can be deposited onto the adhesion layer. In another aspect, a structure is provided including: a substrate; a metal catalyst layer (e.g., platinum) disposed on the substrate; and layered LCO formed on the metal catalyst layer. An adhesion layer can be disposed between the substrate and the metal catalyst layer.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: June 29, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kevin W. Brew, Saurabh Singh, Teodor K. Todorov
  • Patent number: 11023733
    Abstract: A system for analyzing a video file in a shortened time frame, said system comprising: a receiver (VFR) to receive a video file (VF) as an input; a Time Splitter (TR) to split the received video file according to set intervals of time depending on how fast said video is to be analyzed; a Frame splitter (FP) to split a Video Viewing Program (R) into a plurality of frames (F1, F2, . . . Fn); a Key Frame Identification mechanism (KFI) to identify key frames; and linking mechanism (LM) to cause a link to be formed with pre-populated databases and in-house libraries of images (D), of frames, which frames comprising associated tags, thereby determining a score of similar tags per video file in order to determine said genre, thereby determining multiplicity of instances for said time splitter.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: June 1, 2021
    Assignee: Flickstree Productions Pvt Ltd
    Inventors: Nagender Sangra, Saurabh Singh, Rahul Jain
  • Publication number: 20210148968
    Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.
    Type: Application
    Filed: October 8, 2020
    Publication date: May 20, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: James WELLS, Saurabh SINGH, Huy Binh LE, Gavin WILSON, Niall MCGURNAGHAN, Simon R. FOSTER, Mark MCCLOY-STEVENS
  • Patent number: 10976227
    Abstract: The present subject matter describes system (100) for magnetic enrichment of magnetically marked analytes. The system has capture chip (102) comprising a sample chamber (104) for holding sample having magnetically marked analytes, and a recovery chamber (106) connected to the sample chamber by a channel (202). The volume of recovery chamber is smaller than volume of sample chamber (104). The system has magnetic arrangement (108) comprising a set of magnets (110) in which each two adjacent magnets have opposite polarities facing sample chamber. Set of magnets has dimensions that at least conform to coverage area of sample chamber. The magnetic arrangement also has at least one recovery magnet (112) having dimensions conforming to coverage area of recovery chamber and on alignment, the at least one recovery magnet (112) is at a distance farthest away from the recovery chamber. The system has a linear positioner (114) for moving the magnetic arrangement.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: April 13, 2021
    Assignee: INDIAN INSTITUTE OF TECHNOLOGY DELHI
    Inventors: Ravikrishnan Elangovan, Vivekanandan Perumal, Shalini Gupta, Saurabh Singh, Mohita Upadhyay