Patents by Inventor Scott Derner
Scott Derner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6788603Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: September 7, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6785167Abstract: Programming efficiency of a read only memory (ROM) embedded dynamic random access memory (DRAM) is improved by programming only one polarity of bits in non-volatile cells of the ROM embedded DRAM, and then blanket programming volatile cells in the ROM embedded DRAM to represent the remaining bits.Type: GrantFiled: June 18, 2002Date of Patent: August 31, 2004Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Patent number: 6781867Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: GrantFiled: July 11, 2002Date of Patent: August 24, 2004Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Publication number: 20040153725Abstract: Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.Type: ApplicationFiled: February 4, 2003Publication date: August 5, 2004Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6771529Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: August 3, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6768664Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: July 27, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6747889Abstract: A half-density ROM embedded DRAM uses hard programmed non-volatile cells and unprogrammed dynamic cells. By hard programming either a first or second memory cell in a pair of cell, different data states are stored. Two word lines are used to access the memory cell pair. Because one of the cells is hard programmed, sense amplifier circuitry identifies the appropriate data state. The ROM cell can be programmed in numerous different manners. For example, ROM cells can be hard programmed by eliminating cell dielectric to short cell plates to a program voltage, or an electrical plug can be fabricated between the cell plates and shorted to a program voltage. In other embodiments, the ROM cell can be programmed using an anti-fuse programming technique, or by providing a high leakage path (not full short) such as through an active area to the substrate.Type: GrantFiled: December 12, 2001Date of Patent: June 8, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6735108Abstract: A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the memory cells are provided if a single state memory is desired. For example, bias techniques allow un-programmed ROM cells to be read accurately. In one embodiment, the memory includes program circuitry to short capacitor plates together by breaking down an intermediate dielectric layer using anti-fuse programming techniques.Type: GrantFiled: July 8, 2002Date of Patent: May 11, 2004Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Patent number: 6731556Abstract: A DRAM improves cell read margins using bias, or reference, circuitry. The reference circuitry is coupled to a complimentary digit line to improve a differential voltage with an active digit line. One embodiment, improves one's margin by decreasing the complimentary digit line voltage. The reference circuitry can be an un-programmed DRAM cell, a non-volatile ROM memory cell or a conductor coupled to a reference voltage.Type: GrantFiled: February 27, 2003Date of Patent: May 4, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Publication number: 20040071022Abstract: A ROM embedded DRAM allows hard programming of ROM cells by shorting DRAM capacitor plates during fabrication. In one embodiment, the intermediate dielectric layer is removed and the plates are shorted with a conductor. In another embodiment, an upper conductor and dielectric are removed and a conductor is fabricated in contact with the DRAM storage plate. The memory allows ROM cells to be hard programmed to different data states, such as Vcc and Vss.Type: ApplicationFiled: July 31, 2003Publication date: April 15, 2004Applicant: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
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Publication number: 20040027848Abstract: A read only memory (ROM) embedded dynamic random access memory (DRAM) has a 6F2 architecture and uses isolation gates as hard shorting connections for ground or supply voltage connections to program ROM bits within the ROM embedded DRAM.Type: ApplicationFiled: August 12, 2002Publication date: February 12, 2004Applicant: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
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Publication number: 20040008534Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: ApplicationFiled: July 11, 2002Publication date: January 15, 2004Applicant: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Publication number: 20040004855Abstract: A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the memory cells are provided if a single state memory is desired. For example, bias techniques allow un-programmed ROM cells to be read accurately. In one embodiment, the memory includes program circuitry to short capacitor plates together by breaking down an intermediate dielectric layer using anti-fuse programming techniques.Type: ApplicationFiled: July 8, 2002Publication date: January 8, 2004Applicant: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Publication number: 20030231519Abstract: Programming efficiency of a read only memory (ROM) embedded dynamic random access memory (DRAM) is improved by programming only one polarity of bits in non-volatile cells of the ROM embedded DRAM, and then blanket programming volatile cells in the ROM embedded DRAM to represent the remaining bits.Type: ApplicationFiled: June 18, 2002Publication date: December 18, 2003Applicant: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
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Patent number: 6665207Abstract: A ROM embedded DRAM allows hard programming of ROM cells by shorting DRAM capacitor plates during fabrication. In one embodiment, the intermediate dielectric layer is removed and the plates are shorted with a conductor. In another embodiment, an upper conductor and dielectric are removed and a conductor is fabricated in contact with the DRAM storage plate. The memory allows ROM cells to be hard programmed to different data states, such as Vcc and Vss.Type: GrantFiled: November 14, 2001Date of Patent: December 16, 2003Assignee: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
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Publication number: 20030185062Abstract: Proximity effects of close neighbors to a cell that is to be printed are compensated for before printing. A lookup table containing a set of all known proximity mappings of neighbors to the cell to be printed is used to match a placement configuration, and a known correction is applied before printing the cell.Type: ApplicationFiled: March 28, 2002Publication date: October 2, 2003Applicant: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
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Publication number: 20030147268Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: ApplicationFiled: February 28, 2003Publication date: August 7, 2003Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Patent number: 6603693Abstract: A DRAM improves cell read margins using bias, or reference, circuitry. The reference circuitry is coupled to a complimentary digit line to improve a differential voltage with an active digit line. One embodiment, improves one's margin by decreasing the complimentary digit line voltage. The reference circuitry can be an un-programmed DRAM cell, a non-volatile ROM memory cell or a conductor coupled to a reference voltage.Type: GrantFiled: December 12, 2001Date of Patent: August 5, 2003Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Publication number: 20030137882Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: ApplicationFiled: February 28, 2003Publication date: July 24, 2003Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
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Publication number: 20030128566Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: ApplicationFiled: February 28, 2003Publication date: July 10, 2003Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald