Abstract: A method of forming a semiconductor device is provided. The method includes providing a connector structure configured for carrying a signal and providing a semiconductor die. At least a portion of the connector structure and the semiconductor die are encapsulated with an encapsulant. The semiconductor die is interconnected with the connector structure by way of a conductive trace.

Abstract: A method of forming a semiconductor device is provided. The method includes forming a conductive die connector having a first end connected to a die pad of a semiconductor die. A first encapsulant formulated for selective activation by way of a laser encapsulates at least a portion of the semiconductor die. A first conductive trace of a redistribution layer is formed by plating a conductive material on a first laser activated path on a first major surface of the first encapsulant. The first conductive trace is directly connected to a second end of the die connector. A second encapsulant formulated for selective activation by way of a laser encapsulates at least the first conductive trace and exposed portions of the first major surface of the first encapsulant.

Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Abstract: A method of forming a semiconductor device is provided. The method includes encapsulating with an encapsulant at least a portion of a semiconductor die and a package substrate, the encapsulant including an additive selectively activated by way of a laser. A first opening is formed in the encapsulant, the first opening exposing a predetermined first portion of the package substrate. The additive is activated at the sidewalls of the first opening. A second opening is formed in the encapsulant, the second opening encircling the first opening and exposing a predetermined second portion of the package substrate. The additive is activated at the sidewalls the second opening. A conductive material is plated on the additive activated portions of the encapsulant.

Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and an RF sub-assembly on a carrier substrate. The RF sub-assembly includes a sacrificial blank, a conductive radiant element, and a conductive shield. At least a portion of the semiconductor die and the RF sub-assembly is encapsulated with an encapsulant. The carrier substrate is separated from the encapsulated semiconductor die and RF sub-assembly to expose a side of the sacrificial blank. The sacrificial blank is removed to form a cavity in the RF sub-assembly such that the conductive radiant element and the conductive shield are exposed through the cavity. A package lid is affixed on the encapsulated semiconductor die and RF sub-assembly and configured to serve as a signal reflector for propagation of an RF signal.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.

Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

Abstract: A semiconductor device package having stress isolation is provided. The semiconductor device package includes a package substrate and a sensor attached to the package substrate. A first isolation material is formed around a perimeter of the sensor. An encapsulant encapsulates at least a portion of the first isolation material and the package substrate.

Abstract: A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.

Abstract: A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A first conductive connector is affixed to a first connector pad of the package substrate. A conformal thermal conductive layer is applied on the semiconductor die and a portion of the first surface of the package substrate. The conformal thermal conductive layer is configured and arranged as a thermal conduction path between the semiconductor die and the first conductive connector.

Abstract: A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.

Abstract: A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.

Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die on a carrier substrate and placing a sacrificial blank on the carrier substrate with a routing structure attached to the sacrificial blank. At least a portion of the semiconductor die, sacrificial blank, and routing structure are encapsulated with an encapsulant. The carrier substrate is separated from a first side of the encapsulated semiconductor die, sacrificial blank, and routing structure to expose a surface of the sacrificial blank. The sacrificial blank is etched to form a cavity in the encapsulant and expose a portion of the routing structure exposed through the cavity.

Abstract: A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.

Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and routing structure on a carrier substrate. At least a portion of the semiconductor die and routing structure are encapsulated with an encapsulant. A cavity formed in the encapsulant. A top portion of the routing structure is exposed through the cavity. A conductive trace is formed to interconnect the semiconductor die with the routing structure.

Abstract: A method of forming a semiconductor device is provided. The method includes providing a connector structure configured for carrying a signal and providing a semiconductor die. At least a portion of the connector structure and the semiconductor die are encapsulated with an encapsulant. The semiconductor die is interconnected with the connector structure by way of a conductive trace.

Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Abstract: A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.

Abstract: A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.

Abstract: A method of forming a self-aligned waveguide is provided. The method includes forming a first alignment feature on a packaged semiconductor device and a second alignment feature on a waveguide structure. A solder material is applied to the first alignment feature or the second alignment feature. The waveguide structure is placed onto the packaged semiconductor device such that the second alignment feature overlaps the first alignment feature. The solder material is reflowed to cause the waveguide structure to align with the packaged semiconductor device.