Patents by Inventor Scott M. Hayes

Scott M. Hayes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11557544
    Abstract: A semiconductor device is provided. The device includes a semiconductor die and a launcher structure attached to a package substrate. The launcher structure includes a launcher substrate, a launcher portion formed from a conductive layer at a major surface of the launcher substrate, and a translation pad formed from the conductive layer at the major surface. The translation pad is separate from the launcher portion. A translation feature is formed on the translation pad. The translation feature is configured for alignment of a waveguide structure.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: January 17, 2023
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Giorgio Carluccio, Scott M. Hayes
  • Patent number: 11557525
    Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: January 17, 2023
    Assignee: NXP USA, INC.
    Inventors: Zhiwei Gong, Scott M. Hayes, Michael B. Vincent, Betty Hill-Shan Yeung, Rushik P. Tank, Kabir Mirpuri
  • Publication number: 20220392777
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 8, 2022
    Inventors: Zhiwei Gong, Scott M. Hayes, Michael B. Vincent, Vivek Gupta, Richard Te Gan
  • Publication number: 20220384299
    Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.
    Type: Application
    Filed: May 25, 2021
    Publication date: December 1, 2022
    Applicant: NXP USA, Inc.
    Inventors: Zhiwei Gong, Scott M. Hayes, Michael B. Vincent, Betty Hill-Shan Yeung, Rushik P. Tank, Kabir Mirpuri
  • Patent number: 11498829
    Abstract: A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: November 15, 2022
    Assignee: NXP USA, INC.
    Inventors: Stephen Ryan Hooper, Mark Edward Schlarmann, Michael B. Vincent, Scott M. Hayes, Julien Juéry
  • Publication number: 20220344235
    Abstract: A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A thermal conductive structure including a die pad portion is affixed to the semiconductor die. A limb portion of the thermal conductive structure extends laterally away from the die pad portion and overlaps a portion of the package substrate. A thermal conduction path is formed between the semiconductor die and a distal end of the limb portion.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Inventors: Scott M. Hayes, Michael B. Vincent, Zhiwei Gong, Rushik P. Tank, Kabir Mirpuri, Betty Hill-Shan Yeung
  • Publication number: 20220336371
    Abstract: A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 20, 2022
    Inventors: Scott M. Hayes, Michael B. Vincent, Zhiwei Gong, Richard Te Gan, Vivek Gupta
  • Patent number: 11404288
    Abstract: A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel by placing a plurality of semiconductor die on a major side of a carrier substrate and encapsulating with an encapsulant the plurality semiconductor die and the major side of the carrier substrate. A plurality of warpage control features are formed with the encapsulant while encapsulating. The method further includes placing the panel onto a warpage control fixture to substantially flatten the panel. The plurality of warpage control features interlock with mating features of the warpage control fixture.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: August 2, 2022
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Vivek Gupta, Richard Te Gan
  • Publication number: 20220181230
    Abstract: A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A first conductive connector is affixed to a first connector pad of the package substrate. A conformal thermal conductive layer is applied on the semiconductor die and a portion of the first surface of the package substrate. The conformal thermal conductive layer is configured and arranged as a thermal conduction path between the semiconductor die and the first conductive connector.
    Type: Application
    Filed: December 7, 2020
    Publication date: June 9, 2022
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Kabir Mirpuri, Rushik P. Tank, Betty Hill-Shan Yeung
  • Patent number: 11335652
    Abstract: A semiconductor device package that incorporates a waveguide usable for high frequency applications, such as radar and millimeter wave is provided. Embodiments employ a rigid-flex printed circuit board structure that can be folded to form the waveguide while, at the same time, mounting one or more semiconductor device die or packages. Embodiments reduce both the area of the mounted package and the distance signals need to travel between the semiconductor device die and antennas associated with the waveguide.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: May 17, 2022
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper
  • Publication number: 20220068828
    Abstract: A semiconductor device is provided. The device includes a semiconductor die and a launcher structure attached to a package substrate. The launcher structure includes a launcher substrate, a launcher portion formed from a conductive layer at a major surface of the launcher substrate, and a translation pad formed from the conductive layer at the major surface. The translation pad is separate from the launcher portion. A translation feature is formed on the translation pad. The translation feature is configured for alignment of a waveguide structure.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 3, 2022
    Inventors: Michael B. Vincent, Giorgio Carluccio, Scott M. Hayes
  • Publication number: 20220068738
    Abstract: A semiconductor device package having stress isolation is provided. The semiconductor device package includes a package substrate and a sensor attached to the package substrate. A first isolation material is formed around a perimeter of the sensor. An encapsulant encapsulates at least a portion of the first isolation material and the package substrate.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 3, 2022
    Inventors: Michael B. Vincent, Scott M. Hayes, Stephen Ryan Hooper
  • Publication number: 20210391285
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.
    Type: Application
    Filed: August 26, 2021
    Publication date: December 16, 2021
    Inventors: Michael B. Vincent, Giorgio Carluccio, Maristella Spella, Scott M. Hayes
  • Patent number: 11133273
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: September 28, 2021
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Giorgio Carluccio, Maristella Spella, Scott M. Hayes
  • Publication number: 20210221671
    Abstract: A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: Stephen Ryan Hooper, Mark Edward Schlarmann, Michael B. Vincent, Scott M. Hayes, Julien Juéry
  • Publication number: 20210183796
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 17, 2021
    Inventors: MICHAEL B. VINCENT, Giorgio Carluccio, Maristella Spella, Scott M. Hayes
  • Patent number: 11031681
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes attaching a semiconductor die to a package substrate. A bond pad of the semiconductor die is coupled to an antenna radiator formed on the package substrate. A waveguide is attached to the package substrate. An opening of the waveguide includes sidewalls substantially surrounding the antenna radiator. An epoxy material is deposited over at least a portion of the package substrate while leaving the opening void of epoxy material.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: June 8, 2021
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper, Pascal Oberndorff, Walter Parmon
  • Publication number: 20210035927
    Abstract: A semiconductor device package that incorporates a waveguide usable for high frequency applications, such as radar and millimeter wave is provided. Embodiments employ a rigid-flex printed circuit board structure that can be folded to form the waveguide while, at the same time, mounting one or more semiconductor device die or packages. Embodiments reduce both the area of the mounted package and the distance signals need to travel between the semiconductor device die and antennas associated with the waveguide.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Applicant: NXP USA, Inc.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper
  • Publication number: 20200403298
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes attaching a semiconductor die to a package substrate. A bond pad of the semiconductor die is coupled to an antenna radiator formed on the package substrate. A waveguide is attached to the package substrate. An opening of the waveguide includes sidewalls substantially surrounding the antenna radiator. An epoxy material is deposited over at least a portion of the package substrate while leaving the opening void of epoxy material.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper, Pascal Oberndorff, Walter Parmon
  • Patent number: 10834817
    Abstract: A plated hole with a sidewall plating. The plated hole has a vent opening that has a sidewall of non-conductive material that is not plated. During attachment of a joint conductive material such as solder to the sidewall plating, gasses generated from the attachment process are outgassed through the vent opening.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: November 10, 2020
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Zhiwei Gong, Scott M. Hayes