Patents by Inventor Scott R. Summerfelt

Scott R. Summerfelt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5626773
    Abstract: An array of thermal sensor elements (16) is formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of metal contacts (60) is formed to define masked (61) and unmasked (68) regions of the substrate (46). A second layer of metal contacts (62) is formed on the first layer of contacts (60). A radiation etch mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). A dry-etch mask layer (74) is formed to encapsulate the exposed portions of the first layer of contacts (60) and radiation etch mask layer (66). An initial portion of each unmasked region (68) is etched using a dry-etch process. The remaining portions of the unmasked regions (68) are exposed to an etchant (70) and irradiated with electromagnetic energy to substantially increase the reactivity between the remaining portions and the etchant (70).
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: May 6, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: James F. Belcher, Howard R. Beratan, Scott R. Summerfelt
  • Patent number: 5622893
    Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an noble-metal-insulator-alloy barrier layer (e.g. Pd-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the noble-metal-insulator-alloy layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The noble-metal-insulator-alloy barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: April 22, 1997
    Assignees: Texas Instruments Incorporated, California Institute of Technology
    Inventors: Scott R. Summerfelt, Jason Reid, Marc Nicolet, Elzbieta Kolawa
  • Patent number: 5619393
    Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. ruthenium dioxide 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 8, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Bruce E. Gnade
  • Patent number: 5612574
    Abstract: A semiconductor device (10) is illustrated, which is formed on an active region (14) of a semiconductor substrate (12). Device (10) comprises a conductive plug (20) and a barrier layer (22) formed in an opening in an interlevel isolation layer (18). An inner electrode (24) is caused to adhere to the interlevel isolation layer (18) through the use of an adhesion layer (26). High-dielectric-constant layer (28) and an outer electrode (30) are formed outwardly from inner electrode (24).
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: March 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan
  • Patent number: 5609927
    Abstract: Processing techniques for processing high-dielectric-constant material are provided to allow for the formation of an electronic device (10) which comprises a inner electrode (24), a high-dielectric-constant layer (28), and an outer electrode (30). High-dielectric-constant layer (28) is subjected to ultraviolet radiation in an oxygen ozone ambient to eliminate various undesirable hydroxide and carbonate compounds. Layer (28) is further subjected to high pressure isotropic reactive ion etches prior to the deposition of layer (30). The interface between layer (28) and layer (30) is exposed to reactive fluorine and low pressure plasma to improve the fair electric properties and leakage currents associated with layer (28).
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: March 11, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Robert Tsu
  • Patent number: 5605858
    Abstract: Generally, the present invention utilizes a lower electrode comprising a sidewall spacer to form a top surface with rounded corners on which HDC material can be deposited without substantial cracking. An important aspect of the present invention is that the sidewall spacer does not reduce the electrical contact surface area between the lower electrode and the HDC material layer as compared to a similar structure containing a lower electrode without a sidewall spacer. One embodiment of the present invention is a microelectronic structure comprising a supporting layer (e.g. Si substrate 30) having a principal surface, a lower electrode overlying the principal surface of the supporting layer, and a high-dielectric-constant material layer (e.g. BST 44) overlying the top surface of the lower electrode. The lower electrode comprises an adhesion layer (e.g. TiN 36), an unreactive layer (e.g. Pt 42), a sidewall spacer (e.g. SiO.sub.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 25, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushiro Nishioka, Scott R. Summerfelt, Kyung-ho Park, Pijush Bhattacharya
  • Patent number: 5603848
    Abstract: An etching process is provided using electromagnetic radiation and a selected etchant (52) to selectively remove various types of materials (53) from a substrate (48). Contacts (49, 56, 64) may be formed to shield the masked regions (51) of the substrate (48) having an attached coating (20) during irradiation of the unmasked regions (53) of the substrate (48). The unmasked regions (53) are then exposed to an etchant (52) and irradiated to substantially increase their reactivity with the etchant (52) such that the etchant (52) etches the unmasked regions (53) substantially faster than the masked regions (51) and the contacts (49, 56, 64).
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: February 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, James F. Belcher, Scott R. Summerfelt
  • Patent number: 5589284
    Abstract: A preferred embodiment of this invention comprises a perovskite-seed layer (e.g. calcium ruthenate 40) between a conductive oxide layer (e.g. ruthenium oxide 36) and a perovskite dielectric material (e.g. barium strontium titanate 42), wherein the perovskite-seed layer and the conductive oxide layer each comprise the same metal. The metal should be conductive in its metallic state and should remain conductive when partially or fully oxidized. Generally, the perovskite-seed layer has a perovskite or perovskite-like crystal structure and lattice parameters which are similar to the perovskite dielectric layer formed thereon. At a given deposition temperature, the crystal quality and other properties of the perovskite dielectric will generally be enhanced by depositing it on a surface having a similar crystal structure. Undesirable crystal structure formation will generally be minimized and lower processing temperatures may be used to deposit the perovskite dielectric layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 31, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan
  • Patent number: 5585300
    Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an amorphous nitride barrier layer (e.g. Ti-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the amorphous nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The amorphous nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: December 17, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Patent number: 5581436
    Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive fire can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 3, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Peter S. Kirlin, Bruce E. Gnade
  • Patent number: 5576928
    Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g. palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 19, 1996
    Assignees: Texas Instruments Incorporated, Advanced Technology Materials, Inc.
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Peter S. Kirlin, Bruce E. Gnade
  • Patent number: 5566045
    Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: October 15, 1996
    Assignees: Texas Instruments, Inc., Advanced Technology Materials, Inc.
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Peter S. Kirlin, Bruce E. Gnade
  • Patent number: 5554866
    Abstract: Generally, according to the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38) but before deposition of an HDC material (e.g. BST 42). An important aspect of the present invention is that the pre-oxidation of the sidewall generally causes a substantial amount of the potential sidewall expansion (and consequent noble metal layer deformation) to occur before deposition of the HDC material. One embodiment of the present invention is a microelectronic structure comprising a supporting layer having a principal surface, and an adhesion layer overlying the principal surface of the supporting layer, wherein the adhesion layer comprises a top surface and an expanded, oxidized sidewall (e.g. TiO.sub.2 40).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 10, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushiro Nishioka, Scott R. Summerfelt, Kyung-ho Park, Pijush Bhattacharya
  • Patent number: 5554564
    Abstract: An improved method of forming a capacitor electrode for a microelectronic structure such as a dynamic read only memory is disclosed which has a high dielectric constant (HDC) material as a capacitor dielectric. According to an embodiment of the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38) but before deposition of an HDC material (e.g. BST 42). An important aspect of the present invention is that the pre-oxidation of the sidewall generally causes a substantial amount of the potential sidewall expansion (and consequent noble metal layer deformation) to occur before deposition of the HDC material.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: September 10, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushiro Nishioka, Scott R. Summerfelt, Kyung-ho Park, Pijush Bhattacharya
  • Patent number: 5536965
    Abstract: Thermal isolation mesas 36 comprising a porous material 64 are used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous material 64 is preferably a silicon-dioxide xerogel. The mesas 36 may also comprise a protective film 66.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 16, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, Chih-Chen Cho, Scott R. Summerfelt
  • Patent number: 5528102
    Abstract: An anode plate 50 for use in a field emission flat panel display device comprises a transparent planar substrate 58 having a plurality of electrically conductive, parallel stripes 52 comprising the anode electrode of the device, which are covered by phosphors 54.sub.R, 54.sub.G and 54.sub.B. A substantially opaque, electrically insulating material 56 is affixed to substrate 58 in the spaces between conductors 52, acting as a barrier to the passage of ambient light into and out of the device. The electrical insulating quality of opaque material 56 increases the electrical isolation of conductive stripes 52 from one another, reducing the risk of breakdown due to increased leakage current. Opaque material 56 preferably comprises glass having impurities dispersed therein, wherein the impurities may include one or more organic dyes, selected to provide relatively uniform opacity over the visible range of the electromagnetic spectrum.
    Type: Grant
    Filed: June 19, 1995
    Date of Patent: June 18, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Bruce E. Gnade, Daron G. Evans, Scott R. Summerfelt, Jules D. Levine
  • Patent number: 5520992
    Abstract: Novel methods of forming capacitors containing high dielectric materials are disclosed. Capacitors are made by forming a layer of conductive metal nitride (e.g. ruthenium nitride, 28), then forming a layer of a high dielectric constant material (e.g. barium strontium titanate, 30) on the metal nitride layer, then forming a layer of a non-metal containing electrically conductive compound (e.g. ruthenium oxide, 32) on the layer of high dielectric constant material. Typically, the high dielectric constant material is a transition metal oxide, a titanate, a titanate doped with one or more rare earth elements, a titanate doped with one or more alkaline earth metals, or combinations thereof. Preferably, the conductive compound is ruthenium nitride, ruthenium dioxide, tin nitride, tin oxide, titanium nitride, titanium monoxide, or combinations thereof. The conductive compound may be doped to increase its electrical conductivity.
    Type: Grant
    Filed: June 22, 1993
    Date of Patent: May 28, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Monte A. Douglas, Scott R. Summerfelt
  • Patent number: 5504041
    Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), a conductive exotic-nitride barrier layer (e.g. Ti--A--N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the exotic-nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The exotic-nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: April 2, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Patent number: 5504330
    Abstract: The invention described forms improved ferroelectric (or pyroelectric) layer by adding lead to an original perovskite layer having an original ferroelectric (or pyroelectric) critical grain size, then forming a layer of the lead enhanced perovskite layer having an average grain size less than the original ferroelectric (or pyroelectric) critical grain size whereby the remanent polarization (or pyroelectric figure of merit) of the layer is substantially greater than the remanent polarization (or pyroelectric figure of merit) of the original perovskite layer with an average grain size similar to the average grain size of the layer. The critical ferroelectric (or pyroelectric) grain size, as used herein, means the largest grain size such that the remanent polarization (or pyroelectric figure of merit) starts to rapidly decrease with decreasing grain sizes. Preferably, n-type lead enhanced perovskite layer is doped with one or more acceptor dopants whereby the resistivity is substantially increased.
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: April 2, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Bernard Kulwicki
  • Patent number: 5489548
    Abstract: Generally, the present invention utilizes a lower electrode comprising a sidewall spacer to form a top surface with rounded corners on which HDC material can be deposited without substantial cracking. An important aspect of the present invention is that the sidewall spacer does not reduce the electrical contact surface area between the lower electrode and the HDC material layer as compared to a similar structure containing a lower electrode without a sidewall spacer. One embodiment of the present invention is a microelectronic structure comprising a supporting layer (e.g. Si substrate 30) having a principal surface, a lower electrode overlying the principal surface of the supporting layer, and a high-dielectric-constant material layer (e.g. BST 44) overlying the top surface of the lower electrode. The lower electrode comprises an adhesion layer (e.g TiN 36), an unreactive layer (e.g. Pt 42), a sidewall spacer (e.g. SiO.sub.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: February 6, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushiro Nishioka, Scott R. Summerfelt, Kyung-Ho Park, Pijush Bhattacharya