Patents by Inventor Scott R. Summerfelt

Scott R. Summerfelt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5473171
    Abstract: This is a method for fabricating a structure useful in semiconductor circuitry. The method comprises: growing a germanium layer 28 directly or indirectly on a semiconductor substrate 20; and depositing a high-dielectric constant oxide 32 (e.g. a ferroelectric oxide) on the germanium layer. Preferably, the germanium layer is epitaxially grown on the semiconductor substrate. This is also a semiconductor structure, comprising: a semiconductor substrate; a germanium layer on the semiconductor substrate; and a high-dielectric constant oxide on the germanium layer. Preferably the germanium layer is single-crystal. Preferably the substrate is silicon and the germanium layer is less than about 1 nm thick or the substrate is gallium arsenide (in which case the thickness of the germanium layer is not as important). A second germanium layer 40 may be grown on top of the high-dielectric constant oxide and a conducting layer 42 (possibly epitaxial) grown on the second germanium layer.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: December 5, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Patent number: 5471364
    Abstract: A preferred embodiment of this invention comprises a first thin dielectric buffer layer of a first leakage-current-density material (e.g. strontium titanate 32) with a first moderate-dielectric-constant, a high-dielectric-constant layer of a second leakage-current-density material (e.g. barium strontium titanate 34) overlaying the first thin dielectric buffer layer, and a second thin dielectric buffer layer of a third leakage-current-density material (e.g. strontium titanate 36) with a second moderate-dielectric-constant overlaying the high-dielectric-constant layer, wherein the first and third leakage-current-density materials have substantially lower leakage-current-densities than the second leakage-current-density material. The first and second thin moderate-dielectric-constant buffer layers (e.g. strontium titanate 32, 36) substantially limit the leakage-current-density of the structure, with only modest degradation of the dielectric constant of the structure.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: November 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan
  • Patent number: 5403437
    Abstract: This is a device and method of forming such, wherein the device has an amorphous "TEFLON" (TFE AF) layer. The method comprising: depositing an TFE AF layer 36 on a substrate; combining a fluorosurfactant with a first material to produce a second material 38; and depositing the second material 38 on the TFE AF layer 36. The method may include: patterning and etching the second material; removing the second material; and forming a third material 42 on the TFE AF layer 44. The third material may be a metal or a semiconductor. The ZFSNF fluorosurfactant may be combined with a photoresist and then patterned and etched. The TFE AF layer may also be heated. A second coating of the second material may also be added.
    Type: Grant
    Filed: November 5, 1993
    Date of Patent: April 4, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, Chih-Chen Cho, Scott R. Summerfelt
  • Patent number: 5393352
    Abstract: This is a method for fabricating a structure useful in semiconductor circuitry. The method comprises: growing a buffer layer of non-Pb/Bi-containing high-dielectric constant oxide layer directly or indirectly on a semiconductor substrate; and depositing a Pb/Bi-containing high-dielectric constant oxide on the buffer layer. Alternately this may be a structure useful in semiconductor circuitry, comprising: a buffer layer 26 of non-lead-containing high-dielectric constant oxide layer directly or indirectly on a semiconductor substrate 10; and a lead-containing high-dielectric constant oxide 28 on the buffer layer. Preferably a germanium layer 12 is epitaxially grown on the semiconductor substrate and the buffer layer is grown on the germanium layer. When the substrate is silicon, the non-Pb/Bi-containing high-dielectric constant oxide layer is preferably less than about 10 nm thick.
    Type: Grant
    Filed: September 27, 1993
    Date of Patent: February 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Patent number: 5348894
    Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: September 20, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Bruce E. Gnade, Scott R. Summerfelt
  • Patent number: 5326721
    Abstract: This is a method for fabricating a structure useful in semiconductor circuitry. The method comprises: growing a germanium layer 28 directly or indirectly on a semiconductor substrate 20; and depositing a high-dielectric constant oxide 32 (e.g. a ferroelectric oxide) on the germanium layer. Preferably, the germanium layer is epitaxially grown on the semiconductor substrate. This is also a semiconductor structure, comprising: a semiconductor substrate; a germanium layer on the semiconductor substrate; and a high-dielectric constant oxide on the germanium layer. Preferably the germanium layer is single-crystal. Preferably the substrate is silicon and the germanium layer is less than about 1 nm thick or the substrate is gallium arsenide (in which case the thickness of the germanium layer is not as important). A second germanium layer 40 may be grown on top of the high-dielectric constant oxide and a conducting layer 42 (possibly epitaxial) grown on the second germanium layer.
    Type: Grant
    Filed: May 1, 1992
    Date of Patent: July 5, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Patent number: 5312516
    Abstract: A tantalum pentoxide substrate 34 immersed in a liquid ambient (e.g. 10% hydrofluoric acid 30) and illuminated with radiation (e.g. collimated visible/ultraviolet radiation 24) produced by a radiation source (e.g. a 200 Watt mercury xenon arc lamp 20). A window 26 which is substantially transparent to the collimated radiation 24 allows the radiated energy to reach the Ta.sub.2 O.sub.5 substrate 34. An etch mask (e.g. organic photoresist 32) may be positioned between the radiation source 20 and the substrate 34. The Ta.sub.2 O.sub.5 substrate 34 and liquid ambient 30 are maintained at a nominal temperature (e.g. 25.degree. C.). Without illumination, the Ta.sub.2 O.sub.5 is not appreciably etched by the liquid ambient. Upon illumination the etch rate is substantially increased.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: May 17, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Monte A. Douglas, Howard R. Beratan, Scott R. Summerfelt
  • Patent number: 5238530
    Abstract: A titanate substrate (e.g. lead zirconate titanate 34) is immersed in a liquid ambient (e.g. 12 molar concentration hydrochloric acid 30) and illuminated with radiation (e.g. collimated visible/ultraviolet radiation 24) produced by a radiation source (e.g. a 200 Watt mercury xenon arc lamp 20). A window 26 which is substantially transparent to the collimated radiation 24 allows the radiated energy to reach the titanate substrate 34. An etch mask 32 may be positioned between the radiation source 20 and the substrate 34. The titanate substrate 34 and liquid ambient 30 are maintained at a nominal temperature (e.g. 25.degree. C.). Without illumination, the titanate is not appreciably etched by the liquid ambient. Upon illumination the etch rate is substantially increased.
    Type: Grant
    Filed: April 20, 1992
    Date of Patent: August 24, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Monte A. Douglas, Howard R. Beratan, Scott R. Summerfelt
  • Patent number: 5201989
    Abstract: A niobium pentoxide substrate 34 immersed in a liquid ambient (e.g. 10% hydrofluoric acid 30) and illuminated with radiation (e.g. collimated visible/ultraviolet radiation 24) produced by a radiation source (e.g. a 200 Watt mercury xenon arc lamp 20). A window 26 which is substantially transparent to the collimated radiation 24 allows the radiated energy to reach the Nb.sub.2 O.sub.5 substrate 34. An etch mask (e.g. organic photoresist 32) may be positioned between the radiation source 20 and the substrate 34. The Nb.sub.2 O.sub.5 substrate 34 and liquid ambient 30 are maintained at a nominal temperature (e.g. 25.degree. C.). Without illumination, the Nb.sub.2 O.sub.5 is not appreciably etched by the liquid ambient. Upon illumination the etch rate is substantially increased.
    Type: Grant
    Filed: April 20, 1992
    Date of Patent: April 13, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Monte A. Douglas, Howard R. Beratan, Scott R. Summerfelt