Abstract: A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.

Abstract: A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.

Abstract: A multi-stage transistor device is described. One embodiment of such a device is a dual-gate transistor, where the second stage gate is separated from a barrier layer by a thin spacer layer and is grounded through a connection to the source. In one embodiment the thin spacer layer and the second stage gate are placed in an aperture in a spacer layer. In another embodiment, the second stage gate is separated from a barrier layer by a spacer layer. The device can exhibit improved linearity and reduced complexity and cost.

Abstract: An anneal of a gate recess prior to formation of a gate contact, such as a Schottky contact, may reduce gate leakage and/or provide a high quality gate contact in a semiconductor device, such as a transistor. The use of an encapsulation layer during the anneal may further reduce damage to the semiconductor in the gate recess of the transistor. The anneal may be provided, for example, by an anneal of ohmic contacts of the device. Thus, high quality gate and ohmic contacts may be provided with reduced degradation of the gate region that may result from providing a recessed gate structure as a result of etch damage in forming the recess.

Abstract: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

Abstract: Methods of forming semiconductor devices are provided by forming a semiconductor layer on a semiconductor substrate. A mask is formed on the semiconductor layer. Ions having a first conductivity type are implanted into the semiconductor layer according to the mask to form implanted regions on the semiconductor layer. Metal layers are formed on the implanted regions according to the mask. The implanted regions and the metal layers are annealed in a single step to respectively activate the implanted ions in the implanted regions and provide ohmic contacts on the implanted regions. Related devices are also provided.

Abstract: High electron mobility transistors and/or methods of fabricating high electron mobility transistors that include a first Group III-nitride layer having vertically grown regions, laterally grown regions and a coalescence region are provided. A Group III-nitride channel layer is provided on the first Group III-nitride layer and a Group III-nitride barrier layer is provided on the Group III-nitride channel layer. A drain contact, a source contact and a gate contact are provided on the barrier layer. The gate contact is disposed on a portion of the barrier layer on a laterally grown region of the first Group III-nitride layer and at least a portion of one of the source contact and/or the drain contact is disposed on a portion of the barrier layer on a vertically grown region of the first Group III-nitride layer.

Abstract: A transistor device including a field plate is described. One embodiment of such a device includes a field plate separated from a semiconductor layer by a thin spacer layer. In one embodiment, the thickness of spacer layer separating the field plate from the semiconductor layers is less than the thickness of spacer layer separating the field plate from the gate. In another embodiment, the non-zero distance separating the field plate from the semiconductor layers is about 1500 ? or less. Devices according to the present invention can show capacitances which are less drain bias dependent, resulting in improved linearity.

Abstract: A multi-stage transistor device is described. One embodiment of such a device is a dual-gate transistor, where the second stage gate is separated from a barrier layer by a thin spacer layer and is grounded through a connection to the source. In one embodiment the thin spacer layer and the second stage gate are placed in an aperture in a spacer layer. In another embodiment, the second stage gate is separated from a barrier layer by a spacer layer. The device can exhibit improved linearity and reduced complexity and cost.

Abstract: Data traffic, such as wireless data traffic egressing to the Internet, is aggregated at one or more regional aggregation hubs, and a portion(s) of data traffic associated with a subscriber(s) of interest is captured at the regional aggregation hub(s). Data traffic associated with subscribers can be aggregated at an access concentrator(s) and respective public Internet Protocol (IP) addresses can be given to respective subscribers. The data traffic can be aggregated at the regional aggregation hub(s) and data traffic associated with a subscriber(s) of interest can be identified based at least in part on the public IP address(es) of the respective subscriber(s) of interest. The data traffic associated with a subscriber(s) of interest can be captured and provided to a consumer (e.g., law enforcement, service provider) who desires such data.

Abstract: System(s), method(s), and device(s) that can aggregate all or substantially all data traffic, such as wireless data traffic egressing to the Internet, at one or more regional aggregation hubs and capture a portion(s) of data traffic associated with a subscriber(s) of interest at the regional hub(s) are presented. Data traffic associated with subscribers can be aggregated at an access concentrator(s) and respective public Internet Protocol (IP) addresses can be given to respective subscribers. The data traffic can be aggregated at the regional hub(s) and data traffic associated with a subscriber(s) of interest can be identified based at least in part on the public IP address(es) of the respective subscriber(s) of interest. The data traffic associated with a subscriber(s) of interest can be captured and provided to a consumer (e.g., law enforcement, service provider) who desires such data.

Abstract: Methods of importing data from an edge router including a plurality of interface types to a network management system include configuring the edge router to export a flat file containing the data at a designated time to a designated network device communicatively coupled to the edge router. The flat file includes data associated with a plurality of different ones of the interface types. The flat file is received at the designated network device. The data from the received flat file is parsed to a format configured to be imported by the network management system at the designated network device. The parsed data is provided to the network management system.

Abstract: A method of forming a semiconductor device, the method comprising providing a semiconductor layer, and providing a first layer of a first metal on the semiconductor layer. A second layer may be provided on the first layer of the first metal. The second layer may include a layer of silicon and a layer of a second metal, and the first and second metals may be different. The first metal may be titanium and the second metal may be nickel. Related devices, structures, and other methods are also discussed.

Abstract: Methods of forming semiconductor devices having customized contacts are provided including providing a first insulator layer and patterning the first insulator layer such that the first insulator layer defines at least one contact window. A second insulator layer is provided on the first insulator layer and in the at least one contact window such that the second insulator layer at least partially fills the at least one contact window. A first portion of the second insulator layer is etched such that a second portion of the second insulator layer remains in the at least one contact window to provide at least one modified contact window having dimensions that are different than dimensions of the at least one contact window. Related methods and devices are also provided.

Abstract: Methods, systems, and computer-readable media provide for analyzing data traffic captured by a lawful interception system. A first record, one or more intermediate records, and a second record are received. Each of the records contains a record of test traffic, such as a website, transmitted across a broadband network. The first record, the one or more intermediate records, and the second record are reassembled to form various versions of the website. The various versions of the website are displayed so that a visual comparison can be made to verify the operation of the lawful interception system.

Abstract: Methods of forming semiconductor devices having customized contacts are provided including providing a first insulator layer and patterning the first insulator layer such that the first insulator layer defines at least one contact window. A second insulator layer is provided on the first insulator layer and in the at least one contact window such that the second insulator layer at least partially fills the at least one contact window. A first portion of the second insulator layer is etched such that a second portion of the second insulator layer remains in the at least one contact window to provide at least one modified contact window having dimensions that are different than dimensions of the at least one contact window. Related methods and devices are also provided.

Abstract: A method of forming a semiconductor device, the method comprising providing a semiconductor layer, and providing a first layer of a first metal on the semiconductor layer. A second layer may be provided on the first layer of the first metal. The second layer may include a layer of silicon and a layer of a second metal, and the first and second metals may be different. The first metal may be titanium and the second metal may be nickel. Related devices, structures, and other methods are also discussed.

Abstract: Methods, systems, and computer-readable media provide for verifying a lawful interception system. A first file and a second file are received. The first file is formed by recording data traffic at a computer as the data traffic generated at the computer is transmitted from the computer to a remote network via a broadband remote access server (BRAS), saving the recorded data traffic as a first packet capture and flat file export (PCAP) file, and exporting packet summary lines from the first PCAP file. The second file is formed by intercepting the data traffic as the data traffic egresses from a mediation system to a law enforcement agency (LEA) system, saving the intercepted data traffic as a second PCAP file, and exporting packet summary lines from the second PCAP file. The first file is compared with the second file to verify an accuracy of the mediation system.

Abstract: Disclosed are a switch mode power amplifier and a field effect transistor especially suitable for use in a switch mode power amplifier. The transistor is preferably a compound high electron mobility transistor (HEMT) having a source terminal and a drain terminal with a gate terminal therebetween and positioned on a dielectric material. A field plate extends from the gate terminal over at least two layers of dielectric material towards the drain. The dielectric layers preferably comprise silicon oxide and silicon nitride. A third layer of silicon oxide can be provided with the layer of silicon nitride being positioned between layers of silicon oxide. Etch selectivity is utilized in etching recesses for the gate terminal.

Abstract: System(s), method(s), and device(s) that can aggregate all or substantially all data traffic, such as wireless data traffic egressing to the Internet, at one or more regional aggregation hubs and capture a portion(s) of data traffic associated with a subscriber(s) of interest at the regional hub(s) are presented. Data traffic associated with subscribers can be aggregated at an access concentrator(s) and respective public Internet Protocol (IP) addresses can be given to respective subscribers. The data traffic can be aggregated at the regional hub(s) and data traffic associated with a subscriber(s) of interest can be identified based at least in part on the public IP address(es) of the respective subscriber(s) of interest. The data traffic associated with a subscriber(s) of interest can be captured and provided to a consumer (e.g., law enforcement, service provider) who desires such data.