Patents by Inventor Se-Hwan Yu

Se-Hwan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210217895
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: December 8, 2020
    Publication date: July 15, 2021
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gap Kim, Yu-Gwang Jeong
  • Patent number: 10861978
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: December 24, 2018
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Publication number: 20190312147
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: December 24, 2018
    Publication date: October 10, 2019
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Patent number: 10192992
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Patent number: 9929191
    Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang-Ho Park, Su-Hyoung Kang, Dong-Hwan Shim, Yoon-Ho Khang, Se-Hwan Yu, Min-Jung Lee, Yong-Su Lee
  • Publication number: 20180069129
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 8, 2018
    Inventors: YONG SU LEE, YOON HO KHANG, DONG JO KIM, HYUN JAE NA, SANG HO PARK, SE HWAN YU, CHONG SUP CHANG, DAE HO KIM, JAE NEUNG KIM, MYOUNG GEUN CHA, SANG GAB KIM, YU-GWANG JEONG
  • Patent number: 9882056
    Abstract: A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: January 30, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Su Lee, Yoon-Ho Khang, Se-Hwan Yu, Su-Hyoung Kang
  • Patent number: 9837446
    Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: December 5, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Do-Hyun Kim, Yoon Ho Khang, Dong-Hoon Lee, Sang Ho Park, Se Hwan Yu, Cheol Kyu Kim, Yong-Su Lee, Sung Haeng Cho, Chong Sup Chang, Dong Jo Kim, Jung Kyu Lee
  • Patent number: 9768309
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: September 19, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Publication number: 20170154897
    Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
    Type: Application
    Filed: February 8, 2017
    Publication date: June 1, 2017
    Inventors: Do-Hyun KIM, Yoon Ho KHANG, Dong-Hoon LEE, Sang Ho PARK, Se Hwan YU, Cheol Kyu KIM, Yong-Su LEE, Sung Haeng CHO, Chong Sup CHANG, Dong Jo KIM, Jung Kyu LEE
  • Patent number: 9620609
    Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: April 11, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Jae Na, Yoon Ho Khang, Sang Ho Park, Dong Hwan Shim, Se Hwan Yu, Yong Su Lee, Myoung Geun Cha
  • Patent number: 9595548
    Abstract: A method of manufacturing a color filter substrate includes forming a plurality of trenches having a predetermined depth by etching a surface of a transparent substrate, disposing a color filter material in the plurality of trenches to form a color filter layer, and forming a transparent electrode on the transparent substrate including the color filter layer therein.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: March 14, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Se-Hwan Yu, Byoung-Joo Kim, Hyang-Shik Kong, Kweon-Sam Hong, Yoon-Ho Kang, Young-Joo Choi
  • Patent number: 9589998
    Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: March 7, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Do-Hyun Kim, Yoon Ho Khang, Dong-Hoon Lee, Sang Ho Park, Se Hwan Yu, Cheol Kyu Kim, Yong-Su Lee, Sung Haeng Cho, Chong Sup Chang, Dong Jo Kim, Jung Kyu Lee
  • Publication number: 20160308063
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: June 28, 2016
    Publication date: October 20, 2016
    Inventors: YONG SU LEE, YOON HO KHANG, DONG JO KIM, HYUN JAE NA, SANG HO PARK, SE HWAN YU, CHONG SUP CHANG, DAE HO KIM, JAE NEUNG KIM, MYOUNG GEUN CHA, SANG GAB KIM, YU-GWANG JEONG
  • Patent number: 9379252
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: June 28, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Patent number: 9377629
    Abstract: A lenticular unit includes a transparent substrate; first electrodes being transparent and disposed on the substrate; a second electrode being transparent and elastic; and a transparent material layer interposed between the first and second electrodes and being deformable in a lens shape in a thickness direction depending on a potential applied between the first and second electrodes.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: June 28, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Su Lee, Yoon-Ho Khang, Se-Hwan Yu
  • Publication number: 20160148958
    Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
    Type: Application
    Filed: January 29, 2016
    Publication date: May 26, 2016
    Inventors: Do-Hyun KIM, Yoon Ho KHANG, Dong-Hoon LEE, Sang Ho PARK, Se Hwan YU, Cheol Kyu KIM, Yong-Su LEE, Sung Haeng CHO, Chong Sup CHANG, Dong Jo KIM, Jung Kyu LEE
  • Publication number: 20160141310
    Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
    Type: Application
    Filed: January 26, 2016
    Publication date: May 19, 2016
    Inventors: Sang-Ho PARK, Su-Hyoung KANG, Dong-Hwan SHIM, Yoon-Ho KHANG, Se-Hwan YU, Min-Jung LEE, Yong-Su LEE
  • Patent number: 9343583
    Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang
  • Patent number: 9281343
    Abstract: A thin film transistor display panel includes: a gate electrode, a source electrode and a drain electrode which are included in a thin film transistor on a substrate; a data line connected to the source electrode; a pixel link member connecting the drain electrode to a pixel electrode; and a gate pad connected to the gate electrode through a gate line and including a first gate subpad, a second gate subpad and a gate pad link member, in which the pixel link member and the gate pad link member are substantially same in thickness.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: March 8, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong-Su Lee, Yoon-Ho Khang, Se-Hwan Yu, Dong-Jo Kim, Min-Jung Lee