Patents by Inventor Sean Steedman

Sean Steedman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100090716
    Abstract: An integrated circuit device inductive touch analog front end (AFE) excites selected ones of a plurality of inductive touch sensors, measures voltages across the coils of the plurality of inductive touch sensors, and provides analog output signals representative of these coil voltages. A physical displacement (touch) to the inductive sensor causes the inductance value of the inductive touch sensor to change with a corresponding change in a voltage across the coil of the inductive touch sensor. A digital processor controls selection of each one of the plurality of inductive touch sensors and receives the respective analog output voltage signal from the inductive touch AFE. When a sufficient change in the coil voltage is determined by the digital processor, that inductive touch sensor is assumed to have been actuated and the digital processor takes action based upon which one of the plurality of inductive touch sensors was actuated (touched).
    Type: Application
    Filed: September 16, 2009
    Publication date: April 15, 2010
    Inventors: Sean Steedman, Keith E. Curtis, Radu Ruscu, Petru Cristian Pop
  • Publication number: 20100090717
    Abstract: An integrated circuit device inductive touch analog front end excites selected ones of a plurality of inductive touch sensors and provides analog output signals representative of voltages across the coils of the plurality of inductive touch sensors. Various characteristics of the inductive touch analog front end are programmable. A digital processor controls selection of each one of the plurality of inductive touch sensors and receives the respective analog output voltage signal from the inductive touch AFE. The digital processor may program the characteristics of the inductive touch analog front end. When a sufficient change in the coil voltage is determined by the digital processor, that inductive touch sensor is assumed to have been actuated and the digital processor takes action based upon which one of the plurality of inductive touch sensors was actuated (touched).
    Type: Application
    Filed: September 16, 2009
    Publication date: April 15, 2010
    Inventors: Sean Steedman, Keith E. Curtis, Radu Ruscu, Petru Cristian Pop
  • Publication number: 20100023671
    Abstract: A processor device has a data memory with a linear address space, the data memory being accessible through a plurality of memory banks. At least a subset of the memory banks are organized such that each memory bank of the subset has at least a first and second memory area, wherein no consecutive memory block is formed by the second memory areas of a plurality of consecutive memory banks. An address adjustment unit is provided which, when a predefined address range is used, translates an address within the predefined address range to access said second memory areas such that through the address a plurality of second memory areas form a continuous linear memory block.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 28, 2010
    Inventors: Jerrold S. Zdenek, Joseph Julicher, Sean Steedman, Vivien Delport
  • Patent number: 7589568
    Abstract: A brown-out-reset circuit having programmable power and response time characteristics. These characteristics may be programmed over an n-bit wide bus for 2n different characteristics ranging from very low power consumption and slower response time to very fast response time and higher power consumption. A serial one wire bus may be used instead of the n-bit wide bus.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: September 15, 2009
    Assignee: Microchip Technology Incorporated
    Inventors: Sean Steedman, Ruan Lourens, Richard Hull
  • Publication number: 20090144511
    Abstract: An n-bit microprocessor device has an n-bit central processing unit (CPU); a plurality of special function registers and general purpose registers which are memory-mapped to a plurality of banks, with at least two 16-bit indirect memory address registers which are accessible by the CPU across all banks; a bank access unit for coupling the CPU with one of the plurality of banks; a data memory coupled with the CPU; and a program memory coupled with the CPU, wherein the indirect address registers are operable to access the data memory or program memory and wherein a bit in each of the indirect memory address registers indicates an access to the data memory or to the program memory.
    Type: Application
    Filed: June 27, 2008
    Publication date: June 4, 2009
    Inventors: Joseph Julicher, Zacharias Marthinus Smit, Sean Steedman, Vivien Delport, Jerrold S. Zdenek, Ryan Scott Ellison, Eric Schroeder
  • Publication number: 20090144481
    Abstract: A microcontroller device has a central processing unit (CPU); a data memory coupled with the CPU divided into a plurality of memory banks, a plurality of special function registers and general purpose registers which may be memory-mapped, wherein at least the following special function registers are memory-mapped to all memory banks: a status register, a bank select register, a plurality of indirect memory address registers, a working register, and a program counter high latch; and wherein upon occurrence of a context switch, the CPU is operable to automatically save the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch, and upon return from the context switch restores the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch.
    Type: Application
    Filed: June 27, 2008
    Publication date: June 4, 2009
    Inventors: Joseph Julicher, Zacharias Marthinus Smit, Sean Steedman, Vivien Delport, Jerrold S. Zdenek, Ryan Scott Ellison, Eric Schroeder
  • Publication number: 20080272657
    Abstract: An integrated circuit device provides a choice of external pins (connections) that may be user selectable for coupling an external filter/stabilization capacitor to an internal voltage regulator. However, connecting the output of a internal voltage regulator to an uncharged external filter/stabilization capacitor (or to a capacitor charged to a different voltage level than the internal regulation voltage) through a low impedance path can cause the regulator output voltage to sag/spike if the internal voltage regulator tries to charge/discharge the capacitor up/down to equilibrium with the regulator output voltage. To minimize this potential sag/spike, the voltage on the external filter/stabilization capacitor may be adjusted in a controlled manner to substantially the same voltage as the voltage on the output of the internal voltage regulator, and then the internal voltage regulator is operationally coupled through a low impedance to the external regulator filter/stabilization capacitor.
    Type: Application
    Filed: April 22, 2008
    Publication date: November 6, 2008
    Inventors: Richard HULL, Vivien DELPORT, Zacharias Marthinus SMIT, Sean STEEDMAN, Jerrold S. ZDENEK, Michael CHARLES, Ruan LOURENS
  • Publication number: 20080273391
    Abstract: An internal voltage regulator in an integrated circuit device is always active upon initial start-up and/or power-on-reset operations. The internal voltage regulator protects the low voltage core logic circuits of the integrated circuit device from excessively high voltages that may be present in a particular application. In addition, nonvolatile memory may be part of and operational with the low voltage core logic circuits for storing device operating parameters. Therefore, the internal voltage regulator also protects the low voltage nonvolatile memory from excessive high voltages. Once the integrated circuit device has stabilized and all logic circuits therein are fully function, a bit(s) in the nonvolatile memory may be read to determine if the internal voltage regulator should remain active, e.g., how power operation with a high voltage source, or be placed into a bypass mode for low power operation when the integrated circuit device is powered by a low voltage.
    Type: Application
    Filed: April 14, 2008
    Publication date: November 6, 2008
    Inventors: Sean Steedman, Vivien Delport, Jerrold S. Zdenek, Ruan Lourens, Michael Charles, Joseph Julicher, Eric Schroeder
  • Publication number: 20080272830
    Abstract: A brown-out-reset circuit having programmable power and response time characteristics. These characteristics may be programmed over an n-bit wide bus for 2n different characteristics ranging from very low power consumption and slower response time to very fast response time and higher power consumption. A serial one wire bus may be used instead of the n-bit wide bus.
    Type: Application
    Filed: May 4, 2007
    Publication date: November 6, 2008
    Applicant: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Sean Steedman, Ruan Lourens, Richard Hull