Patents by Inventor Sebastian Brunner

Sebastian Brunner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9337408
    Abstract: A light-emitting diode device has a first carrier and at least one light-emitting diode chip, which is arranged on the first carrier. The first carrier has at least one first and one second carrier part, wherein the light-emitting diode chip rests only on the first carrier part. Furthermore, the first and second carrier parts each have a thermal conductivity. The thermal conductivity of the first carrier part is at least 1.5 times the thermal conductivity of the second carrier part. The first carrier part is surrounded laterally by the second carrier part.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: May 10, 2016
    Assignee: EPCOS AG
    Inventors: Thomas Feichtinger, Sebastian Brunner, Oliver Dernovsek, Klaus-Dieter Aichholzer, Georg Krenn, Axel Pecina, Christian Faistauer
  • Patent number: 9287247
    Abstract: A light-emitting diode arrangement includes a light-emitting diode and a coding resistor for coding the light-emitting diode. The coding resistor is embodied as a star connection of a number of resistors. Furthermore, a module includes a plurality of light-emitting diode arrangements. Furthermore, a method for producing a light-emitting diode arrangement is specified, wherein the coding of a coding resistor is carried out depending on a determined characteristic of the light-emitting diode.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 15, 2016
    Assignee: EPCOS AG
    Inventors: Christian Faistauer, Stefan Leopold Hatzl, Sebastian Brunner
  • Patent number: 9230719
    Abstract: A method for producing an electrical component, comprises providing a ceramic semiconducting base body (10) having a surface (O10) and a first side area (S10a) lying opposite the surface (O10), wherein a metallic layer (40) is contained within the base body. After at least two further metallic layers (210) have been arranged separately from one another on the side area (S10a) of the base body, the arrangement is sintered. An electrically insulating layer (30) is arranged between the at least two further metallic layers (210). A respective contact layer (220) is arranged on the metallic layers (210) by means of a chemical process. In this case, the material of the base body (10) is removed proceeding from the surface (O10) of the base body (10) at most as far as the metallic layer (40) arranged within the base body.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 5, 2016
    Assignee: EPCOS AG
    Inventors: Thomas Feichtinger, Sebastian Brunner
  • Publication number: 20150287703
    Abstract: A light-emitting diode arrangement includes a light-emitting diode and a coding resistor for coding the light-emitting diode. The coding resistor is embodied as a star connection of a number of resistors. Furthermore, a module includes a plurality of light-emitting diode arrangements. Furthermore, a method for producing a light-emitting diode arrangement is specified, wherein the coding of a coding resistor is carried out depending on a determined characteristic of the light-emitting diode.
    Type: Application
    Filed: September 25, 2013
    Publication date: October 8, 2015
    Applicant: EPCOS AG
    Inventors: Christian Faistauer, Stefan Leopold Hatzl, Sebastian Brunner
  • Publication number: 20150243865
    Abstract: A light-emitting diode device has a first carrier and at least one light-emitting diode chip, which is arranged on the first carrier. The first carrier has at least one first and one second carrier part, wherein the light-emitting diode chip rests only on the first carrier part. Furthermore, the first and second carrier parts each have a thermal conductivity. The thermal conductivity of the first carrier part is at least 1.5 times the thermal conductivity of the second carrier part. The first carrier part is surrounded laterally by the second carrier part.
    Type: Application
    Filed: July 22, 2013
    Publication date: August 27, 2015
    Inventors: Thomas Feichtinger, Sebastian Brunner, Oliver Dernovsek, Klaus-Dieter Aichholzer, Georg Krenn, Axel Pecina, Christian Faistauer
  • Publication number: 20150245481
    Abstract: A component assembly and a method for manufacturing a component assembly are disclosed. In some embodiments a component assembly includes a carrier, a metallic structure arranged on the carrier, wherein the metallic structure comprises at least one cavity and an electrical component arranged at least in part in the cavity.
    Type: Application
    Filed: August 2, 2013
    Publication date: August 27, 2015
    Applicant: EPCOS AG
    Inventors: Sebastian Brunner, Thomas Feichtinger
  • Publication number: 20150223329
    Abstract: A carrier plate includes a substrate and at least one conductor track. The conductor track includes a first layer, which is applied directly on the substrate, and a second layer, which is arranged on the first layer. The second layer includes a supply line region and a soldering region. Furthermore, the second layer is completely interrupted between the supply line region and the soldering region. A device can be produced with a carrier plate and an electrical component arranged on the carrier plate.
    Type: Application
    Filed: August 9, 2013
    Publication date: August 6, 2015
    Inventors: Sebastian Brunner, Stefan Leopold Hatzl
  • Publication number: 20150144983
    Abstract: A light-emitting diode device includes a carrier having at least one cavity, a light-emitting diode chip is arranged in a manner at least partly recessed in the at least one cavity, and an ESD protection element, which is formed by a partial region of the carrier. Furthermore, a light-emitting diode device includes a carrier having at least one cavity, a light-emitting diode chip, arranged on the carrier, and an electrical component arranged at least partly recessed in the at least one cavity. Furthermore, the light-emitting diode device includes an ESD protection element, which is formed by a partial region of the carrier.
    Type: Application
    Filed: April 17, 2013
    Publication date: May 28, 2015
    Inventors: Thomas Feichtinger, Oliver Dernovsek, Klaus-Dieter Aichholzer, Sebastian Brunner
  • Patent number: 9001523
    Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: April 7, 2015
    Assignee: Epcos AG
    Inventors: Sebastian Brunner, Gerhard Fuchs, Annette Fischer, Manfred Fischer, Christian Faistauer, Guenter Pudmich, Edmund Payr, Stefan Leopold Hatzl
  • Publication number: 20150022055
    Abstract: A method for producing an electric contact-connection of a multilayer component is specified. A main body has internal electrode layers, a insulating material, an electrically conductive material and a photosensitive material are provided. The insulating material and the electrically conductive material are arranged in a structured manner on an outer side of the multilayer component for the alternate contact-connection of the internal electrode layers. The structured arrangement is produced by the photosensitive material. A multilayer component comprising such a contact-connection is furthermore specified.
    Type: Application
    Filed: February 19, 2013
    Publication date: January 22, 2015
    Inventors: Dieter Somitsch, Franz Rinner, Martin Galler, Johann Ramler, Reinhard Gabl, Sebastian Brunner
  • Publication number: 20140225710
    Abstract: A method for producing an electrical component, comprises providing a ceramic semiconducting base body (10) having a surface (O10) and a first side area (S10a) lying opposite the surface (O10), wherein a metallic layer (40) is contained within the base body. After at least two further metallic layers (210) have been arranged separately from one another on the side area (S10a) of the base body, the arrangement is sintered. An electrically insulating layer (30) is arranged between the at least two further metallic layers (210). A respective contact layer (220) is arranged on the metallic layers (210) by means of a chemical process. In this case, the material of the base body (10) is removed proceeding from the surface (O10) of the base body (10) at most as far as the metallic layer (40) arranged within the base body.
    Type: Application
    Filed: July 26, 2012
    Publication date: August 14, 2014
    Applicant: EPCOS AG
    Inventors: Thomas Feichtinger, Sebastian Brunner
  • Patent number: 8415251
    Abstract: A method for producing an electrical component (1) is proposed, in which a ceramic base body (5) that contains a through-hole contact (10) and at least one metallization surface (20C) electroconductively connected to the through-hole contact is provided in a method step A). On the surface of the base body, an electrically insulating first material is arranged in layer form at least above the through-hole contact in method step B), and thereafter an electrically conductive second material is applied above through-hole contact (10) in method step C). Then a solder contact (30B) that electroconductively connects through-hole contact (10) through passivation layer (25B), which is formed from the first material by sintering, is formed by hardening in method step D).
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: April 9, 2013
    Assignee: EPCOS AG
    Inventors: Sebastian Brunner, Thomas Feichtinger, Günter Pudmich, Horst Schlick, Patrick Schmidt-Winkel
  • Patent number: 8413321
    Abstract: A module substrate includes a multilayer substrate that includes a plurality of layers, a bottommost of the layers being a ceramic layer. Solderable contacts, which include fired pads composed of a conductive paste, are applied to the bottommost ceramic layer. A covering layer overlies the pads. The covering layer covers all outer edges of the pads. A window is cut out of the covering layer. A metallic coating is applied to each pad exclusively within the window.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: April 9, 2013
    Assignee: Epcos AG
    Inventors: Sebastian Brunner, Franz Kaul, Annette Fischer
  • Publication number: 20120218728
    Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.
    Type: Application
    Filed: August 11, 2010
    Publication date: August 30, 2012
    Applicant: EPCOS AG
    Inventors: Sebastian Brunner, Gerhard Fuchs, Annette Fischer, Manfred Fischer, Christian Faistauer, Guenter Pudmich, Edmund Payr, Stefan Leopold Hatzl
  • Publication number: 20110146069
    Abstract: A method for producing an electrical component (1) is proposed, in which a ceramic base body (5) that contains a through-hole contact (10) and at least one metallization surface (20C) electroconductively connected to the through-hole contact is provided in a method step A). On the surface of the base body, an electrically insulating first material is arranged in layer form at least above the through-hole contact in method step B), and thereafter an electrically conductive second material is applied above through-hole contact (10) in method step C). Then a solder contact (30B) that electroconductively connects through-hole contact (10) through passivation layer (25B), which is formed from the first material by sintering, is formed by hardening in method step D).
    Type: Application
    Filed: March 1, 2011
    Publication date: June 23, 2011
    Inventors: Sebastian Brunner, Thomas Feichtinger, Günter Pudmich, Horst Schlick, Patrick Schmidt-Winkel
  • Publication number: 20110148546
    Abstract: A multilayer component includes at least one inductive region and at least one capacitive region. The inductive region includes a ferrite ceramic. Electrode structures are arranged on the outwardly facing top side of the inductive region. The electrode structures form at least one coil structure having an inductance.
    Type: Application
    Filed: January 20, 2011
    Publication date: June 23, 2011
    Inventors: Thomas Feichtinger, Sebastian Brunner
  • Patent number: 7928558
    Abstract: An electrical component includes a base body made using ceramic, metallization surfaces that at least partly define component structures on the base body, a passivation layer that is electrically insulating and over a surface of the base body, solder contacts on the passivation layer, and through-hole contacts inside the base body that are electrically connected to corresponding metallization surfaces. The solder contacts are electrically connected to corresponding through-hole contacts through the passivation layer.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: April 19, 2011
    Assignee: EPCOS AG
    Inventors: Sebastian Brunner, Thomas Feichtinger, Günter Pudmich, Horst Schlick, Patrick Schmidt-Winkel
  • Publication number: 20100224394
    Abstract: A module substrate includes a multilayer substrate that includes a plurality of layers, a bottommost of the layers being a ceramic layer. Solderable contacts, which include fired pads composed of a conductive paste, are applied to the bottommost ceramic layer. A covering layer overlies the pads. The covering layer covers all outer edges of the pads. A window is cut out of the covering layer. A metallic coating is applied to each pad exclusively within the window.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 9, 2010
    Inventors: Sebastian Brunner, Franz Kaul, Annette Fischer
  • Patent number: 7710233
    Abstract: An electrical component having multiple layers includes dielectric layers that are stacked to form a main body, electrodes positioned at intervals between at least some of the dielectric layers, and at least two bumps configured to act as electrical contacts for the electrical component. The bumps are on a surface of the main body. The electrical component also includes contacts in the main body that electrically connect bumps and electrodes. The electrodes define first and second electrode stacks, each of which contacts one of the bumps.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: May 4, 2010
    Assignee: Epcos AG
    Inventors: Thomas Feichtinger, Gunther Pudmich, Sebastian Brunner, Alois Kleewein, Robert Krumphals
  • Patent number: 7710710
    Abstract: An electrical component includes ceramic layers that are stacked to form a base body, electrode layers among the ceramic layers to form at least one capacitor, at least one phase gate on a ceramic layer that corresponds to a surface of the base body, contact surfaces on a top surface of the base body, and through contacts that electrically connect the electrode layers to the contact surfaces. The through contacts are inside the base body at least in part. Side surfaces of the base body are substantially free of surface metallic contacts and of metal plating.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: May 4, 2010
    Assignee: EPCOS AG
    Inventors: Sebastian Brunner, Christian Block, Thomas Feichtinger, Gunter Pudmich